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* Turn two static functions into methods, to simplify calling them.Paul Robinson2018-01-302-14/+10
| | | | llvm-svn: 323821
* [LLVM-C] Add Accessors For A Module's Source File NameRobert Widmann2018-01-304-9/+37
| | | | | | | | | | | | | | Summary: Also unblocks some cleanup in the echo-test. Reviewers: whitequark, deadalnix Reviewed By: whitequark Subscribers: harlanhaskins, llvm-commits Differential Revision: https://reviews.llvm.org/D42618 llvm-svn: 323819
* [ThinLTO/gold] Write empty imports even for modules with symbolsVitaly Buka2018-01-305-39/+59
| | | | | | | | | | | | Summary: ThinLTO may skip object for other reasons, e.g. if there is no summary. Reviewers: pcc, eugenis Subscribers: mehdi_amini, inglorion, eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D42514 llvm-svn: 323818
* [AArch64] Expand testing of zero cycle zeroingEvandro Menezes2018-01-301-34/+29
| | | | | | | | Make sure that r321824 doesn't change zeroing. Differential revision: https://reviews.llvm.org/D42089 llvm-svn: 323816
* [SLP] Add extra test for extractelement shuffle, NFC.Alexey Bataev2018-01-301-0/+25
| | | | llvm-svn: 323815
* Teach ValueMapper to use ODR uniqued types when availableTeresa Johnson2018-01-303-4/+116
| | | | | | | | | | | | | | | | | Summary: This is exposed during ThinLTO compilation, when we import an alias by creating a clone of the aliasee. Without this fix the debug type is unnecessarily cloned and we get a duplicate, undoing the uniquing. Fixes PR36089. Reviewers: mehdi_amini, pcc Subscribers: eraman, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D41669 llvm-svn: 323813
* [dsymutil] Enable -minimize feature.Jonas Devlieghere2018-01-304-0/+27
| | | | | | | | | | | | | Passing -minimize to dsymutil prevents the emission of .debug_inlines, .debug_pubnames, and .debug_pubtypes in favor of the Apple accelerator tables. The actual check in the DWARF linker was added in r323655. This patch simply enables it. Differential revision: https://reviews.llvm.org/D42688 llvm-svn: 323812
* [GlobalISel] Bail out on calls to dllimported functionsMartin Storsjo2018-01-302-1/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D42568 llvm-svn: 323811
* [AArch64] Properly handle dllimport of variables when using fast-iselMartin Storsjo2018-01-303-15/+22
| | | | | | Differential Revision: https://reviews.llvm.org/D42567 llvm-svn: 323810
* [TableGen] Make sure !if is evaluated throughout class inheritance.Artem Belevich2018-01-302-1/+20
| | | | | | | | | | | | | | | | Without the patch !if() is only evaluated if it's used directly. If it's passed through more than one level of class inheritance, we end up with a reference to an anonymous record with unresolved references to the original arguments !if may have used. The root cause of the problem is that TernOpInit::isComplete() was always returning false and that prevented use of the folded value of !if() as an initializer for the record at the next level of inheritance. Differential Revision: https://reviews.llvm.org/D42695 llvm-svn: 323807
* [LoopStrengthReduce] add test to show potential macro-fusion-based diff ↵Sanjay Patel2018-01-301-0/+126
| | | | | | | | (PR35681); NFC This is the baseline output for the test proposed with D42607. llvm-svn: 323806
* [DWARF] Recommitting a test that was removed with r323564. Restricted to x86 ↵Wolfgang Pieb2018-01-301-0/+123
| | | | | | linux target. llvm-svn: 323804
* [XRay] fix 99th percentile lookups by sorting the array correctlyMartin Pelikan2018-01-301-2/+5
| | | | | | | | | | | | | | Summary: It was a copy-paste typo, sorting only to the 90th percentile twice. Now, it only sorts the array prefix once, and extracts what we need. Reviewers: dberris, kpw, eizan Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42690 llvm-svn: 323800
* [Hexagon] Handle non-aligned offsets in globals in extender optimizationKrzysztof Parzyszek2018-01-302-18/+86
| | | | | | | | | | Instructions like memd(r0+##global+1) are legal as long as the entire address is properly aligned. Assuming that "global" is aligned at an 8-byte boundary, the expression "global+1" appears to be misaligned. Handle such cases in HexagonConstExtenders, and make sure that any non- extended offsets generated are still aligned accordingly. llvm-svn: 323799
* Revert: [Hexagon] Make sure that offset on globals matches alignment ↵Krzysztof Parzyszek2018-01-303-60/+34
| | | | | | | | | | | | | requirements This reverts r323562, since it wasn't actually necessary. Constant- extended offsets do not need to be aligned, as long as the effective address is aligned. Keep the testcase, with a modification which checks that such offsets are not unnecessarily avoided. llvm-svn: 323798
* [X86][XOP] Update isVectorShiftByScalarCheap with cases covered by XOPSimon Pilgrim2018-01-302-6/+8
| | | | | | | | Similar to D42437, XOP supports variable shift for v16i8/v8i16/v4i32/v2i64 types. Differential Revision: https://reviews.llvm.org/D42526 llvm-svn: 323797
* [AMDGPU] isRenamable fixes to support copy forwardingGeoff Berry2018-01-306-9/+17
| | | | | | | | | | | Mark more opcodes as hasExtraSrcRegAllocReq so that their operands will be marked as not renamable, to avoid copy forwarding violating the constraint that only one operand may use the constant bus. These changes fix a few mis-compiles when copy forwarding is enabled in MachineCopyPropagation by D41835 (and were reviewed as part of that change). llvm-svn: 323794
* [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr ↵Mark Searles2018-01-302-104/+8
| | | | | | | | | | | | | count in debug output." Patch caused a buildbot failure; arg; http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/17373/s\ teps/build_Lld/logs/stdio : /Users/buildslave/as-bldslv9/lld-x86_64-darwin13/llvm.src/lib/Target/AMDGPU/SIInsertWaitcnts.cpp:1563:18: error: unused variable 'InstCnt' [-Werror,-Wunused-variable] static int32_t InstCnt = 0; " This reverts commit 4f4a7d61e306b67044d9f16bc2016fee806bc2cc. llvm-svn: 323791
* [CodeView] Micro-optimizations to speed up type merging.Zachary Turner2018-01-304-118/+107
| | | | | | | | | | | | Based on a profile, a couple of hot spots were identified in the main type merging loop. The code was simplified, a few loops were re-arranged, and some outlined functions were inlined. This speeds up type merging by a decent amount, shaving around 3-4 seconds off of a 40 second link in my test case. Differential Revision: https://reviews.llvm.org/D42559 llvm-svn: 323790
* [AMDGPU] Add options for waitcnt pass debugging; add instr count in debug ↵Mark Searles2018-01-302-8/+104
| | | | | | | | | | | | | | | output. -amdgpu-waitcnt-forcezero={1|0} Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -amdgpu-waitcnt-forceexp=<n> Force emit a s_waitcnt expcnt(0) before the first <n> instrs -amdgpu-waitcnt-forcelgkm=<n> Force emit a s_waitcnt lgkmcnt(0) before the first <n> instrs -amdgpu-waitcnt-forcevm=<n> Force emit a s_waitcnt vmcnt(0) before the first <n> instrs This patch was pushed ( abb190fd51cd2f9a9eef08c024e109f7f7e909fc ), which caused a buildbot failure, reverted ( 6227480d74da507cf8e1b4bcaffbdb9fb875b4b8 ), and then updated to fix buildbot failures (this patch). Differential Revision: https://reviews.llvm.org/D40091 llvm-svn: 323788
* AMDGPU/SI: Add decoding in the GFX80_UNPACKED decoding namespace.Changpeng Fang2018-01-303-0/+105
| | | | | | | | | | Reviewer: Dmitry (dp). Differential Revision: https://reviews.llvm.org/D42596 llvm-svn: 323785
* [DeadArgumentElimination] Preserve llvm.dbg.values's first argumentPetar Jovanovic2018-01-302-8/+151
| | | | | | | | | | | | | When removing return value Dead Argument Elimination pass clobbers first llvm.dbg.value’s argument for live arguments of that function by replacing it with nullptr. In the next pass it will be deleted, so debug location about those arguments are lost. This change fixes it. Patch by Djordje Todorovic. Differential Revision: https://reviews.llvm.org/D42541 llvm-svn: 323784
* CodeGen: support an extension to pass linker options on ELFSaleem Abdulrasool2018-01-3013-39/+187
| | | | | | | | | | | | | | | | | | Introduce an extension to support passing linker options to the linker. These would be ignored by older linkers, but newer linkers which support this feature would be able to process the linker. Emit a special discarded section `.linker-option`. The content of this section is a pair of strings (key, value). The key is a type identifier for the parameter. This allows for an argument free parameter that will be processed by the linker with the value being the parameter. As an example, `lib` identifies a library to be linked against, traditionally the `-l` argument for Unix-based linkers with the parameter being the library name. Thanks to James Henderson, Cary Coutant, Rafael Espinolda, Sean Silva for the valuable discussion on the design of this feature. llvm-svn: 323783
* [AArch64] Add new target feature to fuse address generation with load or storeEvandro Menezes2018-01-304-0/+152
| | | | | | | | | This feature enables the fusion of the address generation and a corresponding load or store together. Differential revision: https://reviews.llvm.org/D42393 llvm-svn: 323782
* [mips] Fix incorrect sign extension for fpowi libcallSimon Dardis2018-01-303-8/+74
| | | | | | | | | | | | | | | | | PR36061 showed that during the expansion of ISD::FPOWI, that there was an incorrect zero extension of the integer argument which for MIPS64 would then give incorrect results. Address this with the existing mechanism for correcting sign extensions. This resolves PR36061. Thanks to James Cowgill for reporting the issue! Reviewers: atanasyan, hfinkel Differential Revision: https://reviews.llvm.org/D42537 llvm-svn: 323781
* Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass ↵Zaara Syeda2018-01-3017-13/+507
| | | | | | | | | | | | | | | | | | | | | to mark candidates with coldcc attribute. This recommits r322721 reverted due to sanitizer memory leak build bot failures. Original commit message: This patch adds support for the coldcc calling convention for Power. This changes the set of non-volatile registers. It includes a pass to stress test the implementation by marking all static directly called functions with the coldcc attribute through the option -enable-coldcc-stress-test. It also includes an option, -ppc-enable-coldcc, to add the coldcc attribute to functions which are cold at all call sites based on BlockFrequencyInfo when the containing function does not call any non cold functions. Differential Revision: https://reviews.llvm.org/D38413 llvm-svn: 323778
* Add more initializers to quiet a clang warningDaniel Sanders2018-01-301-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: `struct crashreporter_annotations_t` gained one more `uint64_t` field in `CRASHREPORTER_ANNOTATIONS_VERSION` 5 causing an annoying clang warning: ``` llvm/lib/Support/PrettyStackTrace.cpp:92:65: warning: missing field 'abort_cause' initializer [-Wmissing-field-initializers] = { CRASHREPORTER_ANNOTATIONS_VERSION, 0, 0, 0, 0, 0, 0 }; ^ 1 warning generated ``` Let's fix it. Patch by Roman Tereshin Reviewers: qcolombet, echristo, beanz, dexonsmith Reviewed By: echristo Subscribers: dsanders, dexonsmith, beanz, echristo, qcolombet, llvm-commits Differential Revision: https://reviews.llvm.org/D42268 llvm-svn: 323777
* [X86][AVX512] Add VBMI target shuffle-trunc tests Simon Pilgrim2018-01-303-0/+325
| | | | llvm-svn: 323776
* [AArch64] Update test cases for Exynos M3Evandro Menezes2018-01-304-42/+106
| | | | | | Update any test case relevant for Exynos M3. llvm-svn: 323775
* [AArch64] Add new target feature to handle cheap as move for ExynosEvandro Menezes2018-01-303-5/+11
| | | | | | | | | This feature enables special handling of cheap as move in the existing custom handling specifically for Exynos processors. Differential revision: https://reviews.llvm.org/D42387 llvm-svn: 323774
* [AArch64] Add pipeline model for Exynos M3Evandro Menezes2018-01-3010-10/+908
| | | | | | | | Add the scheduling and cost model for Exynos M3. Differential revision: https://reviews.llvm.org/D42387 llvm-svn: 323773
* [RS4GC] Handle call/invoke instructions as base defining values of vectorsDaniel Neilson2018-01-303-0/+48
| | | | | | | | | | | | | | | | | | Summary: There's an asymmetry in the definitions of findBaseDefiningValueOfVector() and findBaseDefiningValue() of RS4GC. The later handles call and invoke instructions, and the former does not. This appears to be simple oversight. This patch remedies the oversight by adding the call and invoke cases to findBaseDefiningValueOfVector(). Reviewers: DaniilSuchkov, anna Reviewed By: anna Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42653 llvm-svn: 323764
* [X86FixupBWInsts] mir-simplify fixup-bw-inst.mir test. NFC.Andrei Elovikov2018-01-301-99/+5
| | | | llvm-svn: 323762
* Revert "[X86] Avoid using high register trick for test instruction"Eric Liu2018-01-307-29/+82
| | | | | | This reverts commit r323690. This causes crash in llc. See the original commit thread for details. llvm-svn: 323761
* [X86] Add test case for PR32690Simon Pilgrim2018-01-301-0/+27
| | | | llvm-svn: 323760
* [DSE] make sure memory is not modified before partial store merging (PR36129)Sanjay Patel2018-01-302-3/+6
| | | | | | | | | | | | We missed a critical check in D30703. We must make sure that no intermediate store is sitting between the stores that we want to merge. This should fix: https://bugs.llvm.org/show_bug.cgi?id=36129 Differential Revision: https://reviews.llvm.org/D42663 llvm-svn: 323759
* [XRay] clarify error messages when parsing broken tracesMartin Pelikan2018-01-301-3/+4
| | | | | | | | | | | | | | | Summary: When there's a mismatch of a function argument being right after the wrong function, print an offset into the file where that happened, to ease further debugging. Reviewers: dberris, eizan, kpw Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42492 llvm-svn: 323758
* [AccelTable] Move print methods to implementation. NFCJonas Devlieghere2018-01-302-78/+93
| | | | | | | This patch moves the implementation of the print methods from the header to the cpp file. llvm-svn: 323757
* Test commit.Brock Wyma2018-01-301-2/+2
| | | | | | As per the LLVM Developer Policy under "Obtainiing Commit Access". llvm-svn: 323754
* Spelling mistake in comment. NFCI.Simon Pilgrim2018-01-301-1/+1
| | | | llvm-svn: 323752
* Change simple-register-allocation-read-undef.mir so that it doesn't fail if ↵Amaury Sechet2018-01-301-1/+1
| | | | | | the file path contains 'dead' . NFC llvm-svn: 323748
* [ARM GlobalISel] Add inst selector tests for G_SITOFP and G_UITOFPDiana Picus2018-01-301-0/+113
| | | | | | These are handled by the TableGen'erated code. llvm-svn: 323732
* [ARM GlobalISel] Map G_SITOFP and G_UITOFPDiana Picus2018-01-302-0/+105
| | | | | | | Straightforward mapping (integer operand to GPR, floating point operand to FPR). llvm-svn: 323731
* [ARM GlobalISel] Legalize G_SITOFP and G_UITOFPDiana Picus2018-01-303-0/+173
| | | | | | | | Legal if we have hardware support, libcall otherwise. Also add supporting code to the legalizer helper for libcalls. llvm-svn: 323730
* [ARM GlobalISel] Add inst selector tests for G_FPTOSI and G_FPTOUIDiana Picus2018-01-301-0/+113
| | | | | | The work is done by the TableGen'erated code. llvm-svn: 323728
* [ARM GlobalISel] Map G_FPTOSI and G_FPTOUIDiana Picus2018-01-302-0/+105
| | | | | | | Straightforward mapping (integer operand goes to GPR, floating point operand goes to FPR). llvm-svn: 323727
* [ARM GlobalISel] Legalize G_FPTOSI and G_FPTOUIDiana Picus2018-01-303-3/+173
| | | | | | | | | Legal if we have hardware support for floating point, libcalls otherwise. Also add the necessary support for libcalls in the legalizer helper. llvm-svn: 323726
* [X86] Auto-generate complete checks. NFCCraig Topper2018-01-301-125/+330
| | | | llvm-svn: 323724
* [DWARF] Corrected test committed in r323670 to use llc instead of llc_dwarf ↵Wolfgang Pieb2018-01-301-2/+2
| | | | | | to avoid multiple triples. llvm-svn: 323721
* [utils] De-duplicate utils/update_{llc_,}test_checks.pyFangrui Song2018-01-305-333/+296
| | | | | | | | Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42654 llvm-svn: 323718
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