summaryrefslogtreecommitdiffstats
path: root/llvm/utils
Commit message (Collapse)AuthorAgeFilesLines
...
* fixed compilation issueElena Demikhovsky2013-07-281-0/+1
| | | | llvm-svn: 187325
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-283-10/+261
| | | | | | | Added 512-bit operands printing. Added instruction formats for KNL instructions. llvm-svn: 187324
* Move the default back to pipefail. I accidentally reverted it before.Rafael Espindola2013-07-261-1/+1
| | | | llvm-svn: 187271
* Propagate pipefail when cloning.Rafael Espindola2013-07-261-4/+6
| | | | llvm-svn: 187268
* Use pipefail when available.Rafael Espindola2013-07-263-3/+8
| | | | | | | | | | | | | | This change makes test with RUN lines like RUN: opt ... | FileCheck fail if opt fails, even if it prints what FileCheck wants. Enabling this found some interesting cases of broken tests that were not being noticed because opt (or some other tool) was crashing late. Pipefail is used when the shell supports it or when using the internal python based tester. llvm-svn: 187261
* Using a different loop induction variable than the enclosing scope. No ↵Aaron Ballman2013-07-251-2/+2
| | | | | | functional changes intended. llvm-svn: 187159
* Fix a bug in TableGen where the intrinsic function name recognizer could ↵Justin Holewinski2013-07-251-0/+18
| | | | | | | | | | | | | | | | | mis-identify names if one was a prefix substring of the other For two intrinsics 'llvm.nvvm.texsurf.handle' and 'llvm.nvvm.texsurf.handle.internal', TableGen was emitting matching code like: if (Name.startswith("llvm.nvvm.texsurf.handle")) ... if (Name.startswith("llvm.nvvm.texsurf.handle.internal")) ... We can never match "llvm.nvvm.texsurf.handle.internal" here because it will always be erroneously matched by the first condition. The fix is to sort the intrinsic names and emit them in reverse order. llvm-svn: 187119
* RegPressure: Order the "pressure sets" by number of regunits per set.Andrew Trick2013-07-253-8/+53
| | | | | | This lets heuristics easily pick the most important set to follow. llvm-svn: 187108
* Split generated asm mnemonic matching table into a separate table for each ↵Craig Topper2013-07-241-38/+71
| | | | | | | | asm variant. This removes the need to store the asm variant in each row of the single table that existed before. Shaves ~16K off the size of X86AsmParser.o. llvm-svn: 187026
* Remove 'else' after 'return'. No functional change.Craig Topper2013-07-231-2/+1
| | | | llvm-svn: 186929
* Remove trailing whitespace.Craig Topper2013-07-231-26/+26
| | | | llvm-svn: 186928
* lit: Support cancellation on WindowsNico Rieck2013-07-191-0/+21
| | | | | | | | | | | | The current machinery using KeyboardInterrupt for canceling doesn't work with multiple threads on Windows as it just cancels the currently run tests but the runners continue. We install a handler for Ctrl-C which stops the provider from providing any more tests to the runners. Together with aborting all currently running tests, this brings lit to a halt. llvm-svn: 186695
* Add a wrapper for open.Rafael Espindola2013-07-161-1/+1
| | | | | | | This centralizes the handling of O_BINARY and opens the way for hiding more differences (like how open behaves with directories). llvm-svn: 186447
* This patch allows targets to define weather the instruction mnemonics in asm ↵Vladimir Medic2013-07-161-4/+7
| | | | | | matcher tables will contain '.' character. llvm-svn: 186388
* Teaching llvm-tblgen to not emit a switch statement when there are no case ↵Aaron Ballman2013-07-153-53/+88
| | | | | | statements. llvm-svn: 186330
* Add 'const' qualifier to some arrays.Craig Topper2013-07-151-1/+1
| | | | llvm-svn: 186312
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector ↵Craig Topper2013-07-143-4/+4
| | | | | | size. llvm-svn: 186274
* Add new directive called CHECK-LABEL to FileCheck.Stephen Lin2013-07-121-29/+94
| | | | | | | | CHECK-LABEL is meant to be used in place on CHECK on lines containing identifiers or other unique labels (they need not actually be labels in the source or output language, though.) This is used to break up the input stream into separate blocks delineated by CHECK-LABEL lines, each of which is checked independently. This greatly improves the accuracy of errors and fix-it hints in many cases, and allows for FileCheck to recover from errors in one block by continuing to subsequent blocks. Some tests will be converted to use this new directive in forthcoming patches. llvm-svn: 186162
* Target/X86: Add explicit Win64 and System V/x86-64 calling conventions.Charles Davis2013-07-121-6/+7
| | | | | | | | | | | | | | | Summary: This patch adds explicit calling convention types for the Win64 and System V/x86-64 ABIs. This allows code to override the default, and use the Win64 convention on a target that wants to use SysV (and vice-versa). This is needed to implement the `ms_abi` and `sysv_abi` GNU attributes. Reviewers: CC: llvm-svn: 186144
* Correct comment.Duncan Sands2013-07-101-1/+1
| | | | llvm-svn: 185987
* Extend 'readonly' and 'readnone' to work on function arguments as well asNick Lewycky2013-07-063-1/+15
| | | | | | | functions. Make the function attributes pass add it to known library functions and when it can deduce it. llvm-svn: 185735
* Add a --crash option to not.Rafael Espindola2013-07-051-2/+21
| | | | | | | | | | | | | Now the two possible uses of not are * not cmd Will return true if cmd doesn't crash and returns false. * not --crash cmd Will return true if cmd crashes. It will be used/tested in a followup commit for the clang crash recovery testing. llvm-svn: 185678
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ↵Craig Topper2013-07-041-2/+2
| | | | | | specifying the vector size. llvm-svn: 185606
* Improve the compression of the tablegen DiffLists by introducing a new sortChad Rosier2013-06-272-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | algorithm when assigning EnumValues to the synthesized registers. The current algorithm, LessRecord, uses the StringRef compare_numeric function. This function compares strings, while handling embedded numbers. For example, the R600 backend registers are sorted as follows: T1 T1_W T1_X T1_XYZW T1_Y T1_Z T2 T2_W T2_X T2_XYZW T2_Y T2_Z In this example, the 'scaling factor' is dEnum/dN = 6 because T0, T1, T2 have an EnumValue offset of 6 from one another. However, in other parts of the register bank, the scaling factors are different: dEnum/dN = 5: KC0_128_W KC0_128_X KC0_128_XYZW KC0_128_Y KC0_128_Z KC0_129_W KC0_129_X KC0_129_XYZW KC0_129_Y KC0_129_Z The diff lists do not work correctly because different kinds of registers have different 'scaling factors'. This new algorithm, LessRecordRegister, tries to enforce a scaling factor of 1. For example, the registers are now sorted as follows: T1 T2 T3 ... T0_W T1_W T2_W ... T0_X T1_X T2_X ... KC0_128_W KC0_129_W KC0_130_W ... For the Mips and R600 I see a 19% and 6% reduction in size, respectively. I did see a few small regressions, but the differences were on the order of a few bytes (e.g., AArch64 was 16 bytes). I suspect there will be even greater wins for targets with larger register files. Patch reviewed by Jakob. rdar://14006013 llvm-svn: 185094
* TableGen: Generate a function for getting operand indices based on their ↵Tom Stellard2013-06-251-0/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | defined names This patch modifies TableGen to generate a function in ${TARGET}GenInstrInfo.inc called getNamedOperandIdx(), which can be used to look up indices for operands based on their names. In order to activate this feature for an instruction, you must set the UseNamedOperandTable bit. For example, if you have an instruction like: def ADD : TargetInstr <(outs GPR:$dst), (ins GPR:$src0, GPR:$src1)>; You can look up the operand indices using the new function, like this: Target::getNamedOperandIdx(Target::ADD, Target::OpName::dst) => 0 Target::getNamedOperandIdx(Target::ADD, Target::OpName::src0) => 1 Target::getNamedOperandIdx(Target::ADD, Target::OpName::src1) => 2 The operand names are case sensitive, so $dst and $DST are considered different operands. This change is useful for R600 which has instructions with a large number of operands, many of which model single bit instruction configuration values. These configuration bits are common across most instructions, but may have a different operand index depending on the instruction type. It is useful to have a convenient way to look up the operand indices, so these bits can be generically set on any instruction. llvm-svn: 184879
* keep only the StringRef version of getFileOrSTDIN.Rafael Espindola2013-06-252-3/+3
| | | | llvm-svn: 184826
* Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit2013-06-181-0/+6
| | | | | | | | For decoding, keep the current behavior of always decoding these as their REP versions. In the future, this could be improved to recognize the cases where these behave as XACQUIRE and XRELEASE and decode them as such. llvm-svn: 184207
* Build Apple's llvmCore with --disable-zlib. <rdar://problem/14182316>Bob Wilson2013-06-181-1/+2
| | | | llvm-svn: 184164
* Support BufferSize on ProcResGroup for unified MOp schedulers.Andrew Trick2013-06-153-6/+18
| | | | | | And add Sandybridge/Haswell resource buffers. llvm-svn: 184034
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-151-10/+7
| | | | | | | | | | | | | Replace the ill-defined MinLatency and ILPWindow properties with with straightforward buffer sizes: MCSchedMode::MicroOpBufferSize MCProcResourceDesc::BufferSize These can be used to more precisely model instruction execution if desired. Disabled some misched tests temporarily. They'll be reenabled in a few commits. llvm-svn: 184032
* Don't use PathV1.h in FileUtilities.h.Rafael Espindola2013-06-131-3/+2
| | | | llvm-svn: 183941
* Avoid using PathV1.h in Program.h.Rafael Espindola2013-06-131-2/+1
| | | | llvm-svn: 183940
* Have sys::FindProgramByName return a std::string.Rafael Espindola2013-06-131-2/+3
| | | | llvm-svn: 183928
* Remove the program class.Rafael Espindola2013-06-121-3/+2
| | | | | | | It was only used to implement ExecuteAndWait and ExecuteNoWait. Expose just those two functions and make Execute and Wait implementations details. llvm-svn: 183864
* tblgen: Assert that InstRWs doesn't grows when we don't expect it.Benjamin Kramer2013-06-101-0/+1
| | | | llvm-svn: 183690
* tblgen: always lookup values from the original vector as it could be grown ↵Benjamin Kramer2013-06-091-6/+6
| | | | | | | | under our feet. PR16281. llvm-svn: 183630
* Add a script to help us create source tar balls for the release.Bill Wendling2013-06-071-0/+83
| | | | llvm-svn: 183509
* Use proper exit code.Bill Wendling2013-06-071-1/+1
| | | | llvm-svn: 183508
* CodeGenSchedule: Use resize instead of copying a vectorArnold Schwaighofer2013-06-071-2/+2
| | | | llvm-svn: 183465
* CodeGenSchedule: smallvector.push_back(smallvector[0]) is dangerousArnold Schwaighofer2013-06-061-1/+3
| | | | | | | | | | The element passed to push_back is not copied before the vector reallocates. The client needs to copy the element first before passing it to push_back. No test case, will be tested by follow-up swift scheduler model change (it segfaults without this change). llvm-svn: 183459
* Remove unimplemented definition. Found using [-Wunused-member-function].Jakub Staszak2013-06-061-2/+0
| | | | llvm-svn: 183426
* SubtargetEmitter fixArnold Schwaighofer2013-06-051-1/+1
| | | | | | | | | Don't output data if we are supposed to ignore the record. Reapply of 183255, I don't think this was causing the tablegen segfault on linux testers. llvm-svn: 183311
* Fix a tblgen subtargetemitter bug, for future Swift support.Andrew Trick2013-06-051-4/+23
| | | | | | | | | | This fixes some of the ridiculously complex code for optimizing the machine model tables that are shared among all processors of a given target. A9 and Swift both use the "special" feature that maps old itinerary classes to new machine model defs. They map different overlapping subsets of instructions, which wasn't handled correctly. llvm-svn: 183302
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-041-1/+1
| | | | llvm-svn: 183273
* SubtargetEmitter fixArnold Schwaighofer2013-06-041-1/+1
| | | | | | Don't output data if we are supposed to ignore the record. llvm-svn: 183255
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-313-7/+18
| | | | | | | This also makes TableGen able to compute sizes/offsets of synthesized indices representing tuples. llvm-svn: 183061
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-313-5/+36
| | | | | | | | | | | | | NOTE: If this broke your out-of-tree backend, in *RegisterInfo.td, change the instances of SubRegIndex that have a comps template arg to use the ComposedSubRegIndex class instead. In TableGen land, this adds Size and Offset attributes to SubRegIndex, and the ComposedSubRegIndex class, for which the Size and Offset are computed by TableGen. This also adds an accessor in MCRegisterInfo, and Size/Offsets for the X86 and ARM subreg indices. llvm-svn: 183020
* Fixed bug when tests in executable partially used absolute paths.Galina Kistanova2013-05-301-3/+5
| | | | llvm-svn: 182910
* Remove the MCRegAliasIterator tables and compute the aliases dynamically.Chad Rosier2013-05-283-66/+3
| | | | | | | | | | | | | | | | | | | | The size reduction in the RegDiffLists are rather dramatic. Here are a few size differences for MCTargetDesc.o files (before and after) in bytes: R600 - 36160B - 11184B - 69% reduction ARM - 28480B - 8368B - 71% reduction Mips - 816B - 576B - 29% reduction One side effect of dynamically computing the aliases is that the iterator does not guarantee that the entries are ordered or that duplicates have been removed. The documentation implies this is a safe assumption and I found no clients that requires these attributes (i.e., strict ordering and uniqueness). My local LNT tester results showed no execution-time failures or significant compile-time regressions (i.e., beyond what I would consider noise) for -O0g, -O2 and -O3 runs on x86_64 and i386 configurations. rdar://12906217 llvm-svn: 182783
* Revert r182715 and r182758Alexey Samsonov2013-05-281-7/+5
| | | | llvm-svn: 182761
OpenPOWER on IntegriCloud