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* [llvm-exegesis] Add support for measuring NumMicroOps.Clement Courbet2018-09-263-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Example output for vzeroall: --- mode: uops key: instructions: - 'VZEROALL' config: '' register_initial_values: cpu_name: haswell llvm_triple: x86_64-unknown-linux-gnu num_repetitions: 10000 measurements: - { debug_string: HWPort0, value: 0.0006, per_snippet_value: 0.0006, key: '3' } - { debug_string: HWPort1, value: 0.0011, per_snippet_value: 0.0011, key: '4' } - { debug_string: HWPort2, value: 0.0004, per_snippet_value: 0.0004, key: '5' } - { debug_string: HWPort3, value: 0.0018, per_snippet_value: 0.0018, key: '6' } - { debug_string: HWPort4, value: 0.0002, per_snippet_value: 0.0002, key: '7' } - { debug_string: HWPort5, value: 1.0019, per_snippet_value: 1.0019, key: '8' } - { debug_string: HWPort6, value: 1.0033, per_snippet_value: 1.0033, key: '9' } - { debug_string: HWPort7, value: 0.0001, per_snippet_value: 0.0001, key: '10' } - { debug_string: NumMicroOps, value: 20.0069, per_snippet_value: 20.0069, key: NumMicroOps } error: '' info: '' assembled_snippet: C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C3 ... Reviewers: gchatelet Subscribers: tschuett, RKSimon, andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D52539 llvm-svn: 343094
* [globalisel][tblgen] Table optimization should consider the C++ code in C++ ↵Daniel Sanders2018-09-251-0/+6
| | | | | | | | predicates This fixes PR39045 llvm-svn: 342997
* Add benchmark and benchmark_main to the Utils folder in IDEs.Aaron Ballman2018-09-211-0/+2
| | | | llvm-svn: 342782
* [WebAssembly] Simplified selecting asmmatcher stack instructions.Wouter van Oortmerssen2018-09-211-10/+0
| | | | | | | | | | | | | | | | Summary: By using the existing isCodeGenOnly bit in the tablegen defs, as suggested by tlively in https://reviews.llvm.org/D51662 Tested: llvm-lit -v `find test -name WebAssembly` Reviewers: tlively Subscribers: dschuff, sbc100, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D52373 llvm-svn: 342772
* [WebAssembly] Made assembler only use stack instruction tablegen defsWouter van Oortmerssen2018-09-211-0/+10
| | | | | | | | | | | | | | | | | | | Summary: This ensures we have the non-register version of the instruction. The stack version of call_indirect now wants a type index argument, so that has been added in the existing tests. Tested: llvm-lit -v `find test -name WebAssembly` Reviewers: dschuff Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51662 llvm-svn: 342753
* [unittests] Do not use llvm::sort in googlemockDean Michael Berris2018-09-201-1/+1
| | | | | | | | | | | | | | Summary: This reverts r329475 which applied to googlemock. This change makes the googlemock implementation in LLVM dependent on LLVM unnecessarily. Reviewers: echristo, mgrang Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D52287 llvm-svn: 342612
* Attempt to unbreak buidlbot lld-x86_64-darwin13 after r342555.Andrea Di Biagio2018-09-191-1/+1
| | | | | | | | | | | | | | | | | | The reason why build #25777 might have failed is because the SmallVector move constructor is _not_ noexcept, and the stl implementation used by that buildbot calls _VSTD::move_if_noexcept() (according to the backtrace). OpcodeInfo has a default move constructor, and the copy constructor is deleted. However, as far as I can see, SmallVector doesn't declare a noexcept move constructor. So, what I believe it is happening here is that, _VSTD::move_if_noexcept() returns an lvalue reference and not an rvalue reference. This eventually triggers a copy that fails to compile. Hopefully, using a std::vector instead of SmallVector (as it was originally suggested by Simon in the code review) should be enough to unbreak the buildbot. llvm-svn: 342561
* [TableGen][SubtargetEmitter] Add the ability for processor models to ↵Andrea Di Biagio2018-09-195-2/+584
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | describe dependency breaking instructions. This patch adds the ability for processor models to describe dependency breaking instructions. Different processors may specify a different set of dependency-breaking instructions. That means, we cannot assume that all processors of the same target would use the same rules to classify dependency breaking instructions. The main goal of this patch is to provide the means to describe dependency breaking instructions directly via tablegen, and have the following TargetSubtargetInfo hooks redefined in overrides by tabegen'd XXXGenSubtargetInfo classes (here, XXX is a Target name). ``` virtual bool isZeroIdiom(const MachineInstr *MI, APInt &Mask) const { return false; } virtual bool isDependencyBreaking(const MachineInstr *MI, APInt &Mask) const { return isZeroIdiom(MI); } ``` An instruction MI is a dependency-breaking instruction if a call to method isDependencyBreaking(MI) on the STI (TargetSubtargetInfo object) evaluates to true. Similarly, an instruction MI is a special case of zero-idiom dependency breaking instruction if a call to STI.isZeroIdiom(MI) returns true. The extra APInt is used for those targets that may want to select which machine operands have their dependency broken (see comments in code). Note that by default, subtargets don't know about the existence of dependency-breaking. In the absence of external information, those method calls would always return false. A new tablegen class named STIPredicate has been added by this patch to let processor models classify instructions that have properties in common. The idea is that, a MCInstrPredicate definition can be used to "generate" an instruction equivalence class, with the idea that instructions of a same class all have a property in common. STIPredicate definitions are essentially a collection of instruction equivalence classes. Also, different processor models can specify a different variant of the same STIPredicate with different rules (i.e. predicates) to classify instructions. Tablegen backends (in this particular case, the SubtargetEmitter) will be able to process STIPredicate definitions, and automatically generate functions in XXXGenSubtargetInfo. This patch introduces two special kind of STIPredicate classes named IsZeroIdiomFunction and IsDepBreakingFunction in tablegen. It also adds a definition for those in the BtVer2 scheduling model only. This patch supersedes the one committed at r338372 (phabricator review: D49310). The main advantages are: - We can describe subtarget predicates via tablegen using STIPredicates. - We can describe zero-idioms / dep-breaking instructions directly via tablegen in the scheduling models. In future, the STIPredicates framework can be used for solving other problems. Examples of future developments are: - Teach how to identify optimizable register-register moves - Teach how to identify slow LEA instructions (each subtarget defining its own concept of "slow" LEA). - Teach how to identify instructions that have undocumented false dependencies on the output registers on some processors only. It is also (in my opinion) an elegant way to expose knowledge to both external tools like llvm-mca, and codegen passes. For example, machine schedulers in LLVM could reuse that information when internally constructing the data dependency graph for a code region. This new design feature is also an "opt-in" feature. Processor models don't have to use the new STIPredicates. It has all been designed to be as unintrusive as possible. Differential Revision: https://reviews.llvm.org/D52174 llvm-svn: 342555
* [benchmark] Cherrypick fix for MinGW/ARM from upstreamMartin Storsjo2018-09-193-1/+6
| | | | | | | | | | This fixes building for Windows on ARM, with MinGW headers. (Building for Windows on ARM with Windows SDK still is unsupported by the benchmark library.) Differential Revision: https://reviews.llvm.org/D52262 llvm-svn: 342549
* [TableGen] CodeGenDAGPatterns::GenerateVariants - use BitVector::set() where ↵Simon Pilgrim2018-09-191-3/+3
| | | | | | | | possible. NFCI. In these cases we are always setting to true. llvm-svn: 342543
* [TableGen] CodeGenDAGPatterns::GenerateVariants - use BitVector::push_back()Simon Pilgrim2018-09-191-2/+1
| | | | | | As mentioned on D52236, this saves 10secs in debug builds of x86 -gen-dag-isel llvm-svn: 342536
* [benchmark] Mention another cherry-picked change in README.LLVM. NFC.Martin Storsjo2018-09-181-0/+2
| | | | | | This was cherry-picked in SVN r342450. llvm-svn: 342506
* [NFC] Update comments regarding BufferSize for ProcResources Jinsong Ji2018-09-181-1/+1
| | | | llvm-svn: 342491
* Use pass-by-reference for-range loop. NFCI.Simon Pilgrim2018-09-181-2/+3
| | | | llvm-svn: 342481
* Fix signed/unsigned comparison warning. NFCI.Simon Pilgrim2018-09-181-1/+1
| | | | llvm-svn: 342469
* [TableGen] CodeGenDAGPatterns::GenerateVariants - full caching of matching ↵Simon Pilgrim2018-09-181-11/+49
| | | | | | | | | | | | predicates Further extension to D51035, this patch avoids all repeated predicates[] matching by caching as it collects the patterns that have multiple variants. Saves around 25secs in debug builds of x86 -gen-dag-isel. Differential Revision: https://reviews.llvm.org/D51839 llvm-svn: 342467
* [benchmark] Lowercase windows specific includesMartin Storsjo2018-09-184-8/+8
| | | | | | | | | | | | | The windows SDK headers don't have self-consistent casing anyway, so we consistently use lowercase for these in other places, in order to fix crosscompilation with mingw headers. This applies an upstream commit: https://github.com/google/benchmark/commit/52613079824ac58d06c070aa9fbbb186a5859e2c Differential Revision: https://reviews.llvm.org/D52181 llvm-svn: 342450
* Fix lit/example/many-tests pickling issueAlex Langford2018-09-142-20/+23
| | | | | | | | | | | | | | | | | Summary: The multiprocess module uses pickling to transfer information between processes and does not know how to pickle the class created in the lit.cfg file and thus the example fails. Implement ManyTests in a separate file and import for the example test passes Patch by Nathan Lanza <nathan@lanza.io> Differential Revision: https://reviews.llvm.org/D51328 llvm-svn: 342269
* Test commit: remove trailing whitespaceJosh Stone2018-09-112-4/+4
| | | | llvm-svn: 341966
* [lit] Disable shtest-timeout on WindowsStella Stamenova2018-09-102-5/+3
| | | | | | | | | | | | Summary: This is the only test that is still failing on Windows - or rather, it is expected to fail on the bots, but passes on the new bot that we're preparing causing a failure, so I'm going to disable it. Since the test has rarely, if ever, passed on the bots, this should have the same effect and it will unblock the creation of the new bot. Reviewers: asmith, delcypher, zturner Subscribers: stella.stamenova, llvm-commits Differential Revision: https://reviews.llvm.org/D51871 llvm-svn: 341856
* [benchmark] Fix flags used to compile benchmark library with clang-clReid Kleckner2018-09-071-1/+1
| | | | | | | | | | `MSVC` is true for clang-cl, but `"${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC"` is false, so we would enable -Wall, which means -Weverything with clang-cl, and we get tons of undesired warnings. Use the simpler condition to fix things. llvm-svn: 341717
* utils/abtest: Refactor and add bisection methodMatthias Braun2018-09-071-125/+278
| | | | | | | | | | | - Refactor/rewrite most of the code. Also make sure it passes pycodestyle/pyflakes now - Add a new mode that performs bisection on the search space. This should be faster in the common case where there is only a small number of files or functions actually leading to failure. The previous sequential behavior can still be accessed via `--seq`. llvm-svn: 341679
* [benchmark] Fix 32-bit build failureKirill Bobyrev2018-09-052-1/+3
| | | | | | | | | | | | | | This patch applies upstream commit: https://github.com/google/benchmark/commit/f0901417c89d123474e6b91365029cfe32cf89dc Tim Northover pointed out that benchmark build might be broken on 32-bit macOS. This commit by Roman Lebedev (lebedev.ri) resolves the issue. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D51677 llvm-svn: 341469
* lit: Use sys.executable for executing builtin commandsTom Stellard2018-08-311-1/+1
| | | | | | | | | | | | | | Summary: The python executable may not exist on all systems so use sys.executable instead. Reviewers: ddunbar, stella.stamenova Subscribers: delcypher, llvm-commits Differential Revision: https://reviews.llvm.org/D51511 llvm-svn: 341244
* Add a utility script to stress test the demangler.Zachary Turner2018-08-301-0/+226
| | | | llvm-svn: 341120
* [WebAssembly] Made disassembler only use stack instructions.Wouter van Oortmerssen2018-08-301-15/+46
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Now uses the StackBased bit from the tablegen defs to identify stack instructions (and ignore register based or non-wasm instructions). Also changed how we store operands, since we now have up to 16 of them per instruction. To not cause static data bloat, these are compressed into a tiny table. + a few other cleanups. Tested: - MCTest - llvm-lit -v `find test -name WebAssembly` Reviewers: dschuff, jgravelle-google, sunfish, tlively Subscribers: sbc100, aheejin, llvm-commits Differential Revision: https://reviews.llvm.org/D51320 llvm-svn: 341081
* Remove debug code accidently committed in rL340837. NFCI.Simon Pilgrim2018-08-291-3/+0
| | | | llvm-svn: 340908
* [WebAssembly][NFC] Document stackifier tablegen backendThomas Lively2018-08-281-1/+12
| | | | | | | | | | | | | | Summary: Add comments to help readers avoid having to read tablegen backends to understand the code. Also remove unecessary breaks from the output. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51371 llvm-svn: 340864
* [WebAssembly][NFC] Fix formatting from rL340781Thomas Lively2018-08-281-2/+4
| | | | | | | | | | Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51367 llvm-svn: 340861
* [lit, shtest-timeout] Always use an internal shell for the shtest-timeout to ↵Stella Stamenova2018-08-281-1/+3
| | | | | | | | | | | | | | | | | | | diagnose buildbot failures Summary: Right now this test is failing on the builtbots on Windows but we have a very similar setup where the test passes. The test is meant to test that specifying a timeout works correctly by running an infnite loop and having it timeout - on the buildbot, the infinite loop doesn't actually execute. This change runs all of the tests in the set using an internal shell rather than an external shell. I expect this will make the test pass which means that either the way the external shell is invoked or the external shell setup on the buildbots is not correct. Regardless of whether the test passes with this change, we'll need to undo this change and have a real fix. @gkistanova was able to get logs from the buildbot to rule out a number of theories as to why this test is failing, but they didn't have enough information to confirm exactly what the issue is. The purpose of this change is to narrow it down, but if someone has a local repro and can aid in debugging, that would make it much speedier (and less prone to making the bots fail). Reviewers: gkistanova, asmith, zturner, modocache, rnk, delcypher Reviewed By: rnk Subscribers: delcypher, llvm-commits, gkistanova Differential Revision: https://reviews.llvm.org/D51326 llvm-svn: 340840
* [TableGen] CodeGenDAGPatterns::GenerateVariants - basic caching of matching ↵Simon Pilgrim2018-08-281-2/+14
| | | | | | | | | | | | | | predicates CodeGenDAGPatterns::GenerateVariants is a costly function in many tblgen commands (33.87% of the total runtime of x86 -gen-dag-isel), and due to the O(N^2) nature of the function, there are a high number of repeated comparisons of the pattern's vector<Predicate>. This initial patch at least avoids repeating these comparisons for every Variant in a pattern. I began investigating caching all the matches before entering the loop but hit issues with how best to store the data and how to update the cache as patterns were added. Saves around 15secs in debug builds of x86 -gen-dag-isel. Differential Revision: https://reviews.llvm.org/D51035 llvm-svn: 340837
* [TableGen] Use std::move where possible in InstructionMemo constructor. NFCI.Simon Pilgrim2018-08-281-6/+6
| | | | | | Requested in post-commit review for rL339670 llvm-svn: 340819
* [NFC] Apply another commit to comply with old CMakeKirill Bobyrev2018-08-282-1/+6
| | | | llvm-svn: 340817
* [benchmark] Silence warning by applying upstream patchKirill Bobyrev2018-08-283-15/+20
| | | | | | | | | | | | | | | | | ompiling benchmark library (introduced in D50894) with the latest bootstrapped Clang produces a lot of warnings, this issue was addressed in the upstream patch I pushed earlier. Upstream patch: https://github.com/google/benchmark/commit/f85304e4e3a0e4e1bf15b91720df4a19e90b589f `README.LLVM` notes were updated to reflect the latest changes. Reviewed by: lebedev.ri Differential Revision: https://reviews.llvm.org/D51342 llvm-svn: 340811
* Pull google/benchmark library to the LLVM treeKirill Bobyrev2018-08-28101-0/+14089
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch pulls google/benchmark v1.4.1 into the LLVM tree so that any project could use it for benchmark generation. A dummy benchmark is added to `llvm/benchmarks/DummyYAML.cpp` to validate the correctness of the build process. The current version does not utilize LLVM LNT and LLVM CMake infrastructure, but that might be sufficient for most users. Two introduced CMake variables: * `LLVM_INCLUDE_BENCHMARKS` (`ON` by default) generates benchmark targets * `LLVM_BUILD_BENCHMARKS` (`OFF` by default) adds generated benchmark targets to the list of default LLVM targets (i.e. if `ON` benchmarks will be built upon standard build invocation, e.g. `ninja` or `make` with no specific targets) List of modifications: * `BENCHMARK_ENABLE_TESTING` is disabled * `BENCHMARK_ENABLE_EXCEPTIONS` is disabled * `BENCHMARK_ENABLE_INSTALL` is disabled * `BENCHMARK_ENABLE_GTEST_TESTS` is disabled * `BENCHMARK_DOWNLOAD_DEPENDENCIES` is disabled Original discussion can be found here: http://lists.llvm.org/pipermail/llvm-dev/2018-August/125023.html Reviewed by: dberris, lebedev.ri Subscribers: ilya-biryukov, ioeric, EricWF, lebedev.ri, srhines, dschuff, mgorny, krytarowski, fedor.sergeev, mgrang, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D50894 llvm-svn: 340809
* [WebAssembly] TableGen backend for stackifying instructionsThomas Lively2018-08-274-1/+40
| | | | | | | | | | | | | | | | | Summary: The new stackification backend generates the giant switch statement used to translate instructions to their stackified forms. I did this because it was more interesting than adding all the different vector versions of the various SIMD instructions to the switch statment manually. Reviewers: aardappel, aheejin, dschuff Subscribers: mgorny, sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D51318 llvm-svn: 340781
* TableGen/SearchableTables: Cast enums to unsigned in generated codeNicolai Haehnle2018-08-231-0/+9
| | | | | | | | | | | | | | | Summary: This should fix signedness warnings when compiling with MSVC. Change-Id: I4664cce0ba91e9b42d21a86fd4a7e82f2320c451 Reviewers: RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D51097 llvm-svn: 340518
* [WebAssembly] Add isEHScopeReturn instruction propertyHeejin Ahn2018-08-214-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Summary: So far, `isReturn` property is used to mean both a return instruction from a functon and the end of an EH scope, a scope that starts with a EH scope entry BB and ends with a catchret or a cleanupret instruction. Because WinEH uses funclets, all EH-scope-ending instructions are also real return instruction from a function. But for wasm, they only serve as the end marker of an EH scope but not a return instruction that exits a function. This mismatch caused incorrect prolog and epilog generation in wasm EH scopes. This patch fixes this. This patch is in the same vein with rL333045, which splits `MachineBasicBlock::isEHFuncletEntry` into `isEHFuncletEntry` and `isEHScopeEntry`. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50653 llvm-svn: 340325
* [TableGen] Don't separately search for DefaultMode when we're going to ↵Simon Pilgrim2018-08-171-1/+3
| | | | | | iterate the set anyway. NFCI. llvm-svn: 340055
* [TableGen] TypeInfer - Cache the legal types as TypeSetByHwModeSimon Pilgrim2018-08-172-18/+13
| | | | | | | | | | | | We were just caching the MVT set of legal types, then every call creating a new TypeSetByHwMode with it and passing it back on the stack. There's no need to do this - we can create and cache the whole TypeSetByHwMode once and return a const reference to it each time. Additionally, TypeInfer::expandOverloads wasn't making use of the fact that the cache just contains a default mode containing all the types. Saves up to 30secs in debug builds of x86 -gen-dag-isel. Differential Revision: https://reviews.llvm.org/D50903 llvm-svn: 340042
* [TableGen] TypeSetByHwMode::insert - cache the default MVT. NFCI.Simon Pilgrim2018-08-171-3/+10
| | | | | | Avoids repeated count()/find() calls that we've already have the default values for. llvm-svn: 340020
* [TableGen] TypeSetByHwMode::operator== optimizationSimon Pilgrim2018-08-161-8/+10
| | | | | | | | | | | | | | This operator is called a great deal, by checking for the cheap isSimple equality cases first (a common occurrence) we can improve performance as we avoid a lot of std::map find/iteration in hasDefault. isSimple also means that a default value is present, so we can avoid some hasDefault calls. This also avoids a rather dodgy piece of logic that was checking for isSimple() && !VTS.isSimple() but not the inverse - it now uses the general hasDefault mode comparison test instead. Saves around 15secs in debug builds of x86 -gen-dag-isel. Differential Revision: https://reviews.llvm.org/D50841 llvm-svn: 339890
* [TableGen] Avoid self getPredicates() != comparison. NFCI.Simon Pilgrim2018-08-161-2/+2
| | | | | | We were performing a completely unnecessary full comparison of the same std::vector<Predicate>. llvm-svn: 339888
* [TableGen] Return ValueTypeByHwMode by const reference from ↵Simon Pilgrim2018-08-162-4/+4
| | | | | | | | CodeGenRegisterClass::getValueTypeNum Avoids costly std::map copies inside ValueTypeByHwMode constructor llvm-svn: 339884
* [TableGen] Remove unnecessary TypeSetByHwMode -> ValueTypeByHwMode -> ↵Simon Pilgrim2018-08-151-1/+1
| | | | | | | | | | | | | | TypeSetByHwMode conversions in getPatternSize I noticed this during profiling of tablegen (PR28222) that we were calling Child->getType(0) which creates a ValueTypeByHwMode on the fly from the requested internal TypeSetByHwMode type and returns it by value, we then treat it as a TypeSetByHwMode reference which involves constructing a new TypeSetByHwMode on the stack with a large amount of std::map iterating/copying all along the way. I am not an expert on tablegen, but AFAICT this is all unnecessary and we should be calling Child->getExtType(0) which returns the original TypeSetByHwMode by reference. This gives me a 90sec reduction in msvc debug builds of x86 -gen-dag-isel. Differential Revision: https://reviews.llvm.org/D50789 llvm-svn: 339812
* [Tablegen][MCInstPredicate] Removed redundant template argument from class ↵Andrea Di Biagio2018-08-146-24/+46
| | | | | | | | | | | | | | | | | | | | | | | | TIIPredicate, and implemented verification rules for TIIPredicates. This patch removes redundant template argument `TargetName` from TIIPredicate. Tablegen can always infer the target name from the context. So we don't need to force users of TIIPredicate to always specify it. This allows us to better modularize the tablegen class hierarchy for the so-called "function predicates". class FunctionPredicateBase has been added; it is currently used as a building block for TIIPredicates. However, I plan to reuse that class to model other function predicate classes too (i.e. not just TIIPredicates). For example, this can be a first step towards implementing proper support for dependency breaking instructions in tablegen. This patch also adds a verification step on TIIPredicates in tablegen. We cannot have multiple TIIPredicates with the same name. Otherwise, this will cause build errors later on, when tablegen'd .inc files are included by cpp files and then compiled. Differential Revision: https://reviews.llvm.org/D50708 llvm-svn: 339706
* [TableGen] Pass string/vector types by const reference (PR37666). NFCISimon Pilgrim2018-08-141-5/+6
| | | | llvm-svn: 339670
* [X86] Don't ignore 0x66 prefix on relative jumps in 64-bit mode. Fix opcode ↵Craig Topper2018-08-131-2/+2
| | | | | | | | | | | | | | | | selection of relative jumps in 16-bit mode. Treat jno/jo like other jcc instructions. The behavior in 64-bit mode is different between Intel and AMD CPUs. Intel ignores the 0x66 prefix. AMD does not. objump doesn't ignore the 0x66 prefix. Since LLVM aims to match objdump behavior, we should do the same. While I was trying to fix this I had change brtarget16/32 to use ENCODING_IW/ID instead of ENCODING_Iv to get the 0x66+REX.W case to act sort of sanely. It's still wrong, but that's a problem for another day. The change in encoding exposed the fact that 16-bit mode disassembly of relative jumps was creating JMP_4 with a 2 byte immediate. It should have been JMP_2. From just printing you can't tell the difference, but if you dumped the encoding it wouldn't have matched what we started with. While fixing that, it exposed that jo/jno opcodes were missing from the switch that this patch deleted and there were no test cases for them. Fixes PR38537. llvm-svn: 339622
* [Tablegen] Replace uses of formatted_raw_ostream with raw_ostream in the ↵Andrea Di Biagio2018-08-134-137/+134
| | | | | | | | | | | | | | | | | | | | | | predicate expander. NFCI This is a follow-up of r339552. As pointed out by Craig in D50566, we don't need a formatted_raw_ostream to indent strings. We can use instead raw_ostream::indent(). Internally, class PredicateExpander already keeps track of the current indentation level. Also, the grammar for predicates is well parenthesized, and therefore we don't need to use a formatted_raw_ostream to continuously track the column number. Instead we can safely replace all the uses of formatted_raw_ostream::PadToColumn() with uses of raw_ostream::indent(). By replacing formatted_raw_ostream with a simpler raw_ostream, we also avoid the implicit check on the newline character on every print to stream. No functional change intended. llvm-svn: 339577
* [Tablegen][SubtargetEmitter] Improve expansion of predicates of a variant ↵Andrea Di Biagio2018-08-131-15/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | scheduling class. This patch refactors the logic that expands predicates of a variant scheduling class. The idea is to improve the readability of the auto-generated code by removing redundant parentheses around predicate expressions, and by removing redundant if(true) statements. This patch replaces the definition of NoSchedPred in TargetSchedule.td with an instance of MCSchedPredicate. The new definition is sematically equivalent to the previous one. The main difference is that now SubtargetEmitter knows that it represents predicate "true". Before this patch, we always generated an if (true) for the default transition of a variant scheduling class. Example (taken from AArch64GenSubtargetInfo.inc) : ``` if (SchedModel->getProcessorID() == 3) { // CycloneModel if ((TII->isScaledAddr(*MI))) return 927; // (WriteIS_WriteLD)_ReadBaseRS if ((true)) return 928; // WriteLD_ReadDefault } ``` Extra parentheses were also generated around the predicate expressions. With this patch, we get the following auto-generated checks: ``` if (SchedModel->getProcessorID() == 3) { // CycloneModel if (TII->isScaledAddr(*MI)) return 927; // (WriteIS_WriteLD)_ReadBaseRS return 928; // WriteLD_ReadDefault } ``` The new auto-generated code behaves exactly the same as before. So, technically this is a non functional change. Differential revision: https://reviews.llvm.org/D50566 llvm-svn: 339552
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