summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen
Commit message (Expand)AuthorAgeFilesLines
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-161-0/+1
* Fix issue with invalid flat operand numberEvandro Menezes2012-11-091-3/+1
* Fix issue with invalid flat operand numberEvandro Menezes2012-11-091-1/+6
* Add support of RTM from TSX extensionMichael Liao2012-11-081-8/+9
* Fix a build problem with xlc. The error message wasRafael Espindola2012-11-022-2/+2
* Generate a table-driven version of TRI::composeSubRegIndices().Jakob Stoklund Olesen2012-11-011-26/+102
* Don't return false when the function's return type is a pointer.Kaelyn Uhrain2012-10-251-2/+2
* Remove exception handling usage from tblgen.Joerg Sonnenberger2012-10-2526-305/+375
* Remove unused member & unnecessary semicolon.David Blaikie2012-10-251-3/+2
* llvm/utils/TableGen/CMakeLists.txt: Update corresponding to r166685.NAKAMURA Takumi2012-10-251-0/+1
* add TableGen support to create relationship maps between instructionsSebastian Pop2012-10-253-0/+612
* Don't use stack unwinding to provide the location information forJoerg Sonnenberger2012-10-244-69/+77
* Allow the commuted form of tied-operand constraints in tablegen ("$dst = $src",Lang Hames2012-10-201-5/+6
* Add an enum for the return and function indexes into the AttrListPtr object. ...Bill Wendling2012-10-151-2/+2
* Attributes RewriteBill Wendling2012-10-151-4/+4
* [ms-inline asm] Use the new API introduced in r165830 in lieu of theChad Rosier2012-10-121-22/+15
* Change (!list.size() == 0) to (!list.empty()). No functional change.Richard Trieu2012-10-121-1/+1
* Remove unnecessary classof()'sSean Silva2012-10-111-2/+0
* Remove extra semicolons.Chad Rosier2012-10-111-2/+2
* tblgen: Compile TableGen without RTTI.Sean Silva2012-10-102-2/+0
* tblgen: Move mini Type hierarchy to LLVM-style RTTI.Sean Silva2012-10-101-4/+22
* tblgen: Use semantically correct RTTI functions.Sean Silva2012-10-109-42/+36
* tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.Sean Silva2012-10-1013-98/+98
* Pass into the AttributeWithIndex::get method an ArrayRef of attributeBill Wendling2012-10-101-35/+27
* TableGen subtarget emitter cleanup.Andrew Trick2012-10-102-29/+39
* misched: Generate IsBuffered flag for machine resources.Andrew Trick2012-10-101-4/+4
* Move TargetData to DataLayout.Micah Villmow2012-10-081-2/+2
* [ms-inline asm] Add a few typedefs to simplify future changes.Chad Rosier2012-10-051-11/+12
* tblgen: Replace uses of dynamic_cast<XXXRecTy> with dyn_cast<>.Sean Silva2012-10-051-1/+1
* Added instregex support to TableGen subtarget emitter.Andrew Trick2012-10-033-10/+84
* TableGen subtarget emitter, nearly first class support for SchedAlias.Andrew Trick2012-10-033-130/+229
* Cleanup TableGen subtarget emitter.Andrew Trick2012-10-032-6/+7
* [ms-inline asm] Default to the 'm' constraint. This matches the behavior of theChad Rosier2012-10-031-3/+3
* tblgen: Migrate llvm-tblgen to new TableGenMain API.Sean Silva2012-10-031-82/+77
* Fix 80-column violations. Cleanup whitespace in generated code.Chad Rosier2012-10-021-15/+23
* [ms-inline asm] Add the convertToMapAndConstraints() function that is used toChad Rosier2012-10-011-45/+38
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-272-2/+2
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-272-2/+2
* Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier2012-09-241-6/+6
* Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier2012-09-241-2/+2
* Machine Model (-schedmodel only). Added SchedAliases.Andrew Trick2012-09-223-87/+295
* [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.Chad Rosier2012-09-211-2/+2
* Whitespace.Chad Rosier2012-09-211-2/+2
* Add in new data types that are used by AMDIL/ANL among others.Micah Villmow2012-09-191-0/+8
* Soften the pattern-can-never-match error in TableGen into a warning. This pat...Owen Anderson2012-09-191-2/+5
* Remove code for setting the VEX L-bit as a function of operand size from the ...Craig Topper2012-09-192-19/+2
* SchedMachineModel: compress the CPU's WriteLatencyTable.Andrew Trick2012-09-193-7/+44
* Iterate deterministicaly over ClassInfo*'sSean Silva2012-09-191-2/+12
* Iterate deterministically over register classesSean Silva2012-09-191-2/+3
* Refactor Record* by-ID comparator to Record.hSean Silva2012-09-192-18/+9
OpenPOWER on IntegriCloud