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* [TableGen] Convert VarDef to range_loop. NFC.Javed Absar2017-10-101-2/+2
| | | | llvm-svn: 315321
* [AsmParser] Add DiagnosticString to register classes in tablegenOliver Stannard2017-10-101-9/+68
| | | | | | | | | | | | | | | | | | | | | | | | | This allows a DiagnosticType and/or DiagnosticString to be associated with a RegisterClass in tablegen, so that we can emit diagnostics in the assembler when a register operand is incorrect. DiagnosticType creates a predictable enum value, which gets returned as the error code when an operand does not match, and can be used by the assembly parser to map to a user-facing diagnostic. DiagnosticString creates an anonymous enum value (currently based on the tablegen class name), and a function to map from enum values to strings will be generated. Both of these work the same was as they do for AsmOperand. This isn't used by any targets yet, but has one (positive) side-effect. It improves the diagnostic codes returned by validateOperandClass - we always want to emit the diagnostic that relates to the expected operand class, but this wasn't always being done when the expected and actual classes were completely different (token/register/custom). This causes a few AArch64 diagnostics to be improved, as Match_InvalidOperand was being returned instead of a specific diagnostic type. Differential revision: https://reviews.llvm.org/D36691 llvm-svn: 315295
* Fix LLDB build for Android.Eugene Zemtsov2017-10-091-1/+1
| | | | | | | | Currently libstdc++ on Android doesn't support std::to_string(). Differential Revision: https://reviews.llvm.org/D38701 llvm-svn: 315246
* [globalisel] Add support for ValueType operands in patterns.Daniel Sanders2017-10-091-1/+9
| | | | | | | | | | | | It's rare but there are a small number of patterns like this: (set i64:$dst, (add i64:$src1, i64:$src2)) These should be equivalent to register classes except they shouldn't check for a specific register bank. This doesn't occur in AArch64/ARM/X86 but does occasionally come up in other in-tree targets such as BPF. llvm-svn: 315226
* [TableGen] remove make_range where not necessaryJaved Absar2017-10-091-6/+5
| | | | llvm-svn: 315209
* [TableGen] Simplify, add range_loop in CodeGenScheduleJaved Absar2017-10-081-11/+10
| | | | llvm-svn: 315183
* [X86][TableGen] Recommitting the X86 memory folding tables TableGen backend ↵Ayman Musa2017-10-084-0/+671
| | | | | | | | | | | | | | | | | | | | | | | | | | while disabling it by default. After the original commit ([[ https://reviews.llvm.org/rL304088 | rL304088 ]]) was reverted, a discussion in llvm-dev was opened on 'how to accomplish this task'. In the discussion we concluded that the best way to achieve our goal (which is to automate the folding tables and remove the manually maintained tables) is: # Commit the tablegen backend disabled by default. # Proceed with an incremental updating of the manual tables - while checking the validity of each added entry. # Repeat previous step until we reach a state where the generated and the manual tables are identical. Then we can safely remove the manual tables and include the generated tables instead. # Schedule periodical (1 week/2 weeks/1 month) runs of the pass: - if changes appear (new entries): - make sure the entries are legal - If they are not, mark them as illegal to folding - Commit the changes (if there are any). CMake flag added for this purpose is "X86_GEN_FOLD_TABLES". Building with this flags will run the pass and emit the X86GenFoldTables.inc file under build/lib/Target/X86/ directory which is a good reference for any developer who wants to take part in the effort of completing the current folding tables. Differential Revision: https://reviews.llvm.org/D38028 llvm-svn: 315173
* [TableGen] Avoid repeated find calls in CodeGenDAGPatterns getters. NFCI.Simon Pilgrim2017-10-071-14/+21
| | | | | | | | The assertion tests were using count() instead of testing the find result, resulting in double the number of searches in debug/assert builds. Instead, call find once (like the release builds do) and assert the result against end(). llvm-svn: 315151
* [TableGen] Avoid unnecessary std::string creationsSimon Pilgrim2017-10-072-13/+13
| | | | | | | | Avoid unnecessary std::string creations in the TreePredicateFn getters and in CodeGenDAGPatterns::getSDNodeNamed Differential Revision: https://reviews.llvm.org/D38624 llvm-svn: 315148
* Strip trailing whitespaceSimon Pilgrim2017-10-062-13/+13
| | | | llvm-svn: 315070
* [TableGen] Simplify SubtargetEmitterJaved Absar2017-10-061-8/+4
| | | | | | Remove unnecessary duplicate if-condition. llvm-svn: 315068
* [TableGen] : CodeGenInsrtuction modify to range loop. NFC.Javed Absar2017-10-061-2/+2
| | | | llvm-svn: 315050
* [TablgeGen] : Tidy up CodeGenSchedule. NFC.Javed Absar2017-10-051-25/+21
| | | | | | | Reviewed by: @MatzeB Differential Revision: https://reviews.llvm.org/D38534 llvm-svn: 314982
* [AsmParser] Add DiagnosticString to AsmOperands in tablegenOliver Stannard2017-10-031-2/+47
| | | | | | | | | | | | | | This adds a DiagnosticString member to the AsmOperand tablegen class, so that the diagnostic text to be used when an assembly operand is incorrect can be stored in the tablegen description of the operand, rather than in a separate switch statement in the AsmParser. If DiagnosticString is used for any operands, tablegen will emit a getMatchKindDiag function, to map from diagnostic enums to strings. Differential revision: https://reviews.llvm.org/D31606 llvm-svn: 314803
* [Assembler] Report multiple near misses for invalid instructionsOliver Stannard2017-10-031-66/+178
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current table-generated assembly instruction matcher returns a 64-bit error code when matching fails. Since multiple instruction encodings with the same mnemonic can fail for different reasons, it uses some heuristics to decide which message is important. This heuristic does not work well for targets that have many encodings with the same mnemonic but different operands, or which have different versions of instructions controlled by subtarget features, as it is hard to know which encoding the user was intending to use. Instead of trying to improve the heuristic in the table-generated matcher, this patch changes it to report a list of near-miss encodings. This list contains an entry for each encoding with the correct mnemonic, but with exactly one thing preventing it from being valid. This thing could be a single invalid operand, a missing target feature or a failed target-specific validation function. The target-specific assembly parser can then report an error message giving multiple options for instruction variants that the user may have been trying to use. For example, I am working on a patch to use this for ARM, which can give this error for an invalid instruction for ARMv6-M: <stdin>:8:3: error: invalid instruction, multiple near-miss encodings found adds r0, r1, #0x8 ^ <stdin>:8:3: note: for one encoding: instruction requires: thumb2 adds r0, r1, #0x8 ^ <stdin>:8:16: note: for one encoding: expected an integer in range [0, 7] adds r0, r1, #0x8 ^ <stdin>:8:16: note: for one encoding: expected a register in range [r0, r7] adds r0, r1, #0x8 ^ This also allows the target-specific assembly parser to apply its own heuristics to suppress some errors. For example, the error "instruction requires: arm-mode" is never going to be useful when targeting an M-profile architecture (which does not have ARM mode). This patch just adds the target-independent mechanism for doing this, all targets still use the old mechanism. I've added a bit in the AsmParser tablegen class to allow targets to switch to this new mechanism. To use this, the target-specific assembly parser will have to be modified for the change in signature of MatchInstructionImpl, and to report errors based on the list of near-misses. Differential revision: https://reviews.llvm.org/D27620 llvm-svn: 314774
* Cleanup some problems with LLVM_ENABLE_DUMP in release builds, andDon Hinton2017-09-271-1/+1
| | | | | | | | always set LLVM_ENABLE_DUMP=ON for +Asserts builds. Differential Revision: https://reviews.llvm.org/D38306 llvm-svn: 314346
* Use const where possible. NFCI.Simon Pilgrim2017-09-271-1/+1
| | | | llvm-svn: 314292
* Tidyup P->getComplexPatternInfo call by moving it inside if( != NULL) test. ↵Simon Pilgrim2017-09-261-3/+1
| | | | | | NFCI. llvm-svn: 314202
* [TableGen] Replace InfoByHwMode::getAsString with writeToStreamKrzysztof Parzyszek2017-09-225-33/+56
| | | | | | | | | | Also add operator<< for use with raw_ostream to InfoByHwMode and its derived classes. Recommitting r313989 with the fix for unresolved references: explicitly define the operator<< in namespace llvm. llvm-svn: 314004
* Remove trailing whitespace. NFCI.Simon Pilgrim2017-09-222-13/+13
| | | | llvm-svn: 313996
* Revert "[TableGen] Replace InfoByHwMode::getAsString with writeToStream"Krzysztof Parzyszek2017-09-225-53/+33
| | | | | | This reverts commit r313989: it breaks Windows bots. llvm-svn: 313990
* [TableGen] Replace InfoByHwMode::getAsString with writeToStreamKrzysztof Parzyszek2017-09-225-33/+53
| | | | | | | Also add operator<< for use with raw_ostream to InfoByHwMode and its derived classes. llvm-svn: 313989
* [TableGen] Return StringRef from ValueTypeByHwMode::getMVTNameSimon Pilgrim2017-09-222-6/+5
| | | | | | | | | | Avoid unnecessary std::string creations during TypeSetByHwMode::writeToStream. Found during investigations into PR28222 Differential Revision: https://reviews.llvm.org/D38174 llvm-svn: 313983
* [TableGen] Tidy up CodeGenRegistersJaved Absar2017-09-211-28/+23
| | | | | | | | | Replacing range loops. Reviewed by: @MatzeB Differential Revision: https://reviews.llvm.org/D38091 llvm-svn: 313874
* [TableGen] Use CHAR_BIT instead of hardcoded 8 with sizeof. NFCCraig Topper2017-09-211-1/+1
| | | | llvm-svn: 313860
* [TableGen] Include StringMap.h instead of StringSet.h since that's the data ↵Craig Topper2017-09-211-1/+1
| | | | | | structure we use. llvm-svn: 313859
* [TableGen] Some optimizations to TableGen.Zachary Turner2017-09-202-44/+52
| | | | | | | | | This changes some STL data types to corresponding LLVM data types that have better performance characteristics. Differential Revision: https://reviews.llvm.org/D37957 llvm-svn: 313783
* [TableGen] Generate formatted DAGISelEmitter without relying on ↵Craig Topper2017-09-191-91/+93
| | | | | | | | | | | | | | formatted_raw_ostream. The generated DAG isel file currently makes use of formatted_raw_ostream primarily for generating a hierarchical representation while also skipping over the initial comment that contains the current index. It was reported in D37957 that this formatting might be slow due to the need to keep track of column numbers by monitoring all the written data for new lines. This patch attempts to rewrite the emitter to make use of simpler formatting mechanisms to generate a fairly similar output. The main difference is that the number in the index comment is now right justified and padded with spaces inside the comment. Previously we appended the spaces after the comment. Differential Revision: https://reviews.llvm.org/D37966 llvm-svn: 313674
* Recommit r313647 now that GCC seems to accept the offeringKrzysztof Parzyszek2017-09-193-45/+230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some member types to MachineValueTypeSet::const_iterator so that iterator_traits can work with it. Improve TableGen performance of -gen-dag-isel (motivated by X86 backend) The introduction of parameterized register classes in r313271 caused the matcher generation code in TableGen to run much slower, particularly so in the unoptimized (debug) build. This patch recovers some of the lost performance. Summary of changes: - Cache the set of legal types in TypeInfer::getLegalTypes. The contents of this set do not change. - Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally this would not be necessary, but in the debug build TableGen is not optimized, so this helps a little bit. - Add an early exit from TypeSetByHwMode::operator== for the case when one or both arguments are "simple", i.e. only have one mode. This saves some time in GenerateVariants. - Finally, replace the underlying storage type in TypeSetByHwMode::SetType with MachineValueTypeSet based on std::array instead of std::set. This significantly reduces the number of memory allocation calls. I've done a number of experiments with the underlying type of InfoByHwMode. The type is a map, and for targets that do not use the parameterization, this map has only one entry. The best (unoptimized) performance, somewhat surprisingly came from std::map, followed closely by std::unordered_map. DenseMap was the slowest by a large margin. Various hand-crafted solutions (emulating enough of the map interface not to make sweeping changes to the users) did not yield any observable improvements. llvm-svn: 313660
* Revert "Improve TableGen performance of -gen-dag-isel (motivated by X86 ↵Krzysztof Parzyszek2017-09-193-222/+45
| | | | | | | | backend)" It breaks a lot of bots due to missing "__iterator_category". llvm-svn: 313651
* Move "(void)variable" closer to the assertion that uses it, NFCKrzysztof Parzyszek2017-09-191-1/+1
| | | | llvm-svn: 313649
* Improve TableGen performance of -gen-dag-isel (motivated by X86 backend)Krzysztof Parzyszek2017-09-193-45/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The introduction of parameterized register classes in r313271 caused the matcher generation code in TableGen to run much slower, particularly so in the unoptimized (debug) build. This patch recovers some of the lost performance. Summary of changes: - Cache the set of legal types in TypeInfer::getLegalTypes. The contents of this set do not change. - Add LLVM_ATTRIBUTE_ALWAYS_INLINE to several small functions. Normally this would not be necessary, but in the debug build TableGen is not optimized, so this helps a little bit. - Add an early exit from TypeSetByHwMode::operator== for the case when one or both arguments are "simple", i.e. only have one mode. This saves some time in GenerateVariants. - Finally, replace the underlying storage type in TypeSetByHwMode::SetType with MachineValueTypeSet based on std::array instead of std::set. This significantly reduces the number of memory allocation calls. I've done a number of experiments with the underlying type of InfoByHwMode. The type is a map, and for targets that do not use the parameterization, this map has only one entry. The best (unoptimized) performance, somewhat surprisingly came from std::map, followed closely by std::unordered_map. DenseMap was the slowest by a large margin. Various hand-crafted solutions (emulating enough of the map interface not to make sweeping changes to the users) did not yield any observable improvements. llvm-svn: 313647
* [globalisel] Add support for intrinsic_w_chain.Daniel Sanders2017-09-191-3/+5
| | | | | | This maps directly to G_INTRINSIC_W_SIDE_EFFECTS. llvm-svn: 313627
* Remove uses of deprecated std::not1.Benjamin Kramer2017-09-171-3/+3
| | | | | | | Lambdas are slightly more verbose, but also more readable. No functionality change intended. llvm-svn: 313482
* Fix selecting legal types in TypeInfer::getLegalTypesKrzysztof Parzyszek2017-09-151-9/+3
| | | | | | Collect all legal types for all modes. llvm-svn: 313380
* Subtarget support for parameterized register class informationKrzysztof Parzyszek2017-09-141-5/+27
| | | | | | | | Implement "checkFeatures" and emitting HW mode check code. Differential Revision: https://reviews.llvm.org/D31959 llvm-svn: 313295
* Remove usages of deprecated std::unary_function and std::binary_function.Benjamin Kramer2017-09-141-1/+1
| | | | | | | | | | These are removed in C++17. We still have some users of unary_function::argument_type, so just spell that typedef out. No functionality change intended. Note that many of the argument types are actually wrong :) llvm-svn: 313287
* Silence warning about unused variable in release buildKrzysztof Parzyszek2017-09-141-0/+1
| | | | llvm-svn: 313273
* TableGen support for parameterized register class informationKrzysztof Parzyszek2017-09-1418-1045/+2052
| | | | | | | | | | | | | | | | | | | | | | | | | This replaces TableGen's type inference to operate on parameterized types instead of MVTs, and as a consequence, some interfaces have changed: - Uses of MVTs are replaced by ValueTypeByHwMode. - EEVT::TypeSet is replaced by TypeSetByHwMode. This affects the way that types and type sets are printed, and the tests relying on that have been updated. There are certain users of the inferred types outside of TableGen itself, namely FastISel and GlobalISel. For those users, the way that the types are accessed have changed. For typical scenarios, these replacements can be used: - TreePatternNode::getType(ResNo) -> getSimpleType(ResNo) - TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo) - TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false) For more information, please refer to the review page. Differential Revision: https://reviews.llvm.org/D31951 llvm-svn: 313271
* [tblgen] Remove uses of std::ptr_fun, it's removed in C++17.Benjamin Kramer2017-09-141-8/+5
| | | | | | No functionality change intended. llvm-svn: 313269
* [MiSched|TableGen] : Tidy up and modernise. NFC.Javed Absar2017-09-132-113/+99
| | | | | | | | | Replacing with range-based loop and substituting 'using'. Reviewed by: @MatzeB Differential Revision: https://reviews.llvm.org/D37748 llvm-svn: 313140
* Remove ancient, commented out code from TableGen, NFCKrzysztof Parzyszek2017-09-122-16/+0
| | | | | | These pieces were commented out in r98534 and r129691, i.e. 6+ years ago. llvm-svn: 313038
* Formatting changes, add LLVM_DUMP_METHOD to a dump function, NFCKrzysztof Parzyszek2017-09-122-6/+6
| | | | llvm-svn: 313037
* [TableGen] Ensure that __lsan_is_turned_off isn't removed by DCE in llvm-tblgenFrancis Ricci2017-09-111-1/+1
| | | | | | | | | | | | | | Summary: Since asan is linked dynamically on Darwin, the weak interface symbol is removed by -Wl,-dead_strip. Reviewers: kcc, compnerd, aaron.ballman Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D37636 llvm-svn: 312914
* [TableGen] Teach tablegen to allow SDNPCommutable nodes with more than 2 ↵Craig Topper2017-09-041-4/+9
| | | | | | | | | | | | | | | | | | | operands. Summary: Tablegen already supports commutable instrinsics with more than 2 operands. There it just assumes the first two operands are commutable. I plan to use this to improve the generation of FMA patterns in the X86 backend. Reviewers: aymanmus, zvi, RKSimon, spatel, arsenm Reviewed By: arsenm Subscribers: arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D37430 llvm-svn: 312464
* [TableGen] Fix a range based for loop to take the value by reference so that ↵Craig Topper2017-08-301-1/+1
| | | | | | SimplifyTree can modify the copy in the array if its needs to. llvm-svn: 312088
* [Bash-autocompletion] Add support for -std=Yuka Takahashi2017-08-291-2/+2
| | | | | | | | | | | | | | | Summary: Add support for autocompleting values of -std= by including LangStandards.def. This patch relies on D36782, and is using two-stage code generation. Reviewers: v.g.vassilev, teemperor, ruiu Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D36820 llvm-svn: 311971
* Revert "Revert r311552: [Bash-autocompletion] Add support for static ↵Yuka Takahashi2017-08-291-0/+26
| | | | | | | | | | | analyzer flags" This reverts commit 7c46b80c022e18d43c1fdafb117b0c409c5a6d1e. r311552 broke lld buildbot because I've changed OptionInfos type from ArrayRef to vector. However the bug is fixed, so I'll commit this again. llvm-svn: 311958
* Try to fix compilation problem with libstdc++Matthias Braun2017-08-281-1/+3
| | | | llvm-svn: 311918
* Address r311914 review commentsMatthias Braun2017-08-281-7/+5
| | | | llvm-svn: 311917
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