| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 90764
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llvm-svn: 90628
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llvm-svn: 90599
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llvm-svn: 90214
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llvm-svn: 89833
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llvm-svn: 89729
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Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
llvm-svn: 89711
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llvm-svn: 89582
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values, resolving references to them, and then removing the definitions.
If a template argument is set to an undefined value, we need to resolve
references to that argument to an explicit undefined value. The current code
leaves the reference to the template argument as it is, which causes an
assertion failure later when the definition of the template argument is
removed.
llvm-svn: 89581
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llvm-svn: 89566
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llvm-svn: 89565
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everything else.
llvm-svn: 89368
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llvm-svn: 89272
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llvm-svn: 89245
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forward declaration and patching tblgen to emit it right. Patch by Amine Khaldi!
llvm-svn: 88798
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replace broken code in VirtRegRewriter.
llvm-svn: 88753
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Approved by Evan Cheng.
llvm-svn: 86797
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since the instruction might use the other result of different type.
llvm-svn: 86462
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llvm-svn: 86239
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llvm-svn: 86206
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llvm-svn: 85910
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won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364.
PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
llvm-svn: 85766
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llvm-svn: 85556
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*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.
llvm-svn: 85530
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bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.
llvm-svn: 85517
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I was trying to check the WIP file to some local repository, but ended up
checking in the llvm repository. Oops!
llvm-svn: 85470
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declaring local variables.
llvm-svn: 85467
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llvm-svn: 85215
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direct inclusion edge from System to Support.
llvm-svn: 85086
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llvm-svn: 84827
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Useful for OptionPreprocessor.
llvm-svn: 84728
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llvm-svn: 84537
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llvm-svn: 84450
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inefficient and broken.
llvm-svn: 84358
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llvm-svn: 84356
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More to follow...
llvm-svn: 84352
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llvm-svn: 84351
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Several instances of PluginPriority in a single file most probably signifies a
programming error.
llvm-svn: 84350
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llvm-svn: 84193
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llvm-svn: 83619
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Important, for example, when calling 'gcc a.o b.o c.o -lD -lE -lF'.
llvm-svn: 83524
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set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.
llvm-svn: 83196
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unused DECLARE instruction.
KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.
llvm-svn: 83006
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llvm-svn: 82957
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llvm-svn: 82955
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- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
This eliminates MachineInstr's std::list member and allows the data to be
created by isel and live for the remainder of codegen, avoiding a lot of
copying and unnecessary translation. This also shrinks MemSDNode.
- Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
fields for MachineMemOperands.
- Change MemSDNode to have a MachineMemOperand member instead of its own
fields with the same information. This introduces some redundancy, but
it's more consistent with what MachineInstr will eventually want.
- Ignore alignment when searching for redundant loads for CSE, but remember
the greatest alignment.
Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.
llvm-svn: 82794
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naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.
llvm-svn: 82790
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llvm-svn: 82709
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llvm-svn: 82456
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llvm-svn: 82244
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