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* [TableGen] Whitespace cleanup in output file. NFCCraig Topper2016-02-111-14/+14
| | | | llvm-svn: 260500
* [TableGen] Simplify code slightly. NFCCraig Topper2016-02-111-6/+3
| | | | llvm-svn: 260499
* SelectionDAG: Make Properties a field of SDPatternOperatorMatt Arsenault2016-02-101-1/+1
| | | | | | | | | Currently you can't specify node properties like commutativity on a PatFrag. If you want to create a PatFrag on a commutative node with a hasOneUse predicate, this enables you to specify that the PatFrag is also commutable. llvm-svn: 260404
* TableGen: Add IsOptional field to AsmOperandClassTom Stellard2016-02-051-1/+15
| | | | | | | | | | | | | | | Summary: This makes it possible to specify some operands as optional to the AsmMatcher. Setting this field to true will prevent the AsmMatcher from emitting 'too few operands' errors when there are missing optional operands. Reviewers: olista01, ab Subscribers: nhaustov, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15755 llvm-svn: 259913
* Unify the target opcode enum in TargetOpcodes.h and the FixedInstrs array inDavid L Kreitzer2016-02-031-12/+2
| | | | | | | | CodeGenTarget.cpp to avoid the ordering dependence. NFCI. Differential Revision: http://reviews.llvm.org/D16826 llvm-svn: 259726
* Minor performance tweaks to llvm-tblgen (and a few that might be a good idea)Reid Kleckner2016-02-032-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds a reserve call to an expensive function (`llvm::LoadIntrinsics`), and may fix a few other low hanging performance fruit (I've put them in comments for now, so we can discuss). **Motivation:** As I'm sure other developers do, when I build LLVM, I build the entire project with the same config (`Debug`, `MinSizeRel`, `Release`, or `RelWithDebInfo`). However, the `Debug` config also builds llvm-tblgen in `Debug` mode. Later build steps that run llvm-tblgen then can actually be the slowest steps in the entire build. Nobody likes slow builds. Reviewers: rnk, dblaikie Differential Revision: http://reviews.llvm.org/D16832 Patch by Alexander G. Riccio llvm-svn: 259683
* [TableGen] Add 'register alternative name matching' supportDylan McKay2016-02-031-0/+34
| | | | | | | | | | | | | | | | | Summary: This adds a new attribute which targets can set in TableGen which causes a function to be generated which matches register alternative names. This is very similar to `ShouldEmitMatchRegisterName`, except it works on alt names. This patch is currently used by the out of tree part of the AVR backend. It reduces code duplication greatly, and has the effect that you do not need to hardcode altname to register mappings in C++. It will not work on targets which have registers which share the same aliases. Reviewers: stoklund, arsenm, dsanders, hfinkel, vkalintiris Subscribers: hfinkel, dylanmckay, llvm-commits Differential Revision: http://reviews.llvm.org/D16312 llvm-svn: 259636
* Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.Eugene Zelenko2016-02-021-11/+5
| | | | | | Differential revision: http://reviews.llvm.org/D16793 llvm-svn: 259539
* [TableGen] Store result of getInstructionsByEnumValue in an ArrayRef instead ↵Craig Topper2016-02-015-15/+11
| | | | | | of accidentally copying to a vector. llvm-svn: 259336
* No need to use utostr/utohexstr when writing into a raw_ostream. NFCCraig Topper2016-01-311-24/+30
| | | | llvm-svn: 259314
* [llvm-tblgen] Avoid StringMatcher for GCC and MS builtin namesReid Kleckner2016-01-271-91/+56
| | | | | | | | | | | | | | | This brings the compile time of Function.cpp from ~40s down to ~4s for me locally. It also shaves off about 400KB of object file size in a release+asserts build. I also realized that the AMDGPU backend does not have any GCC builtin names to match, so the extra lookup was a no-op. I removed it to silence a zero-length string table array warning. There should be no functional change here. This change really ends the story of PR11951. llvm-svn: 258897
* [llvm-tblgen] Stop emitting the intrinsic name matching codeReid Kleckner2016-01-261-60/+0
| | | | | | | | | The AMDGPU backend was the last user of the old StringMatcher recognition code. Move it over to the new lookupLLVMIntrinsicName funciton, which is now improved to handle all of the interesting edge cases exposed by AMDGPU intrinsic names. llvm-svn: 258875
* Remove autoconf supportChris Bieneman2016-01-261-18/+0
| | | | | | | | | | | | | | | | Summary: This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html "I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened." - Obi Wan Kenobi Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16471 llvm-svn: 258861
* Fix Clang-tidy modernize-use-nullptr and modernize-use-override warnings; ↵Eugene Zelenko2016-01-261-14/+10
| | | | | | | | other minor fixes. Differential revision: reviews.llvm.org/D16568 llvm-svn: 258831
* Sort intrinsics by LLVM intrinsic name, rather than tablegen def nameReid Kleckner2016-01-261-0/+4
| | | | | | | | | | | | Step one towards using a simple binary search to lookup intrinsic IDs instead of our crazy table generated switch+memcmp+startswith code that makes Function.cpp take about a minute to compile. See PR24785 and PR11951 for why we should do this. The X86 backend contains tables that need to be sorted on intrinsic ID, so reorder those. llvm-svn: 258757
* [TableGen] Fix sort order of asm operand classesOliver Stannard2016-01-251-20/+85
| | | | | | | | | | | | | | | | | | | | | | This is a fix for https://llvm.org/bugs/show_bug.cgi?id=22796. The previous implementation of ClassInfo::operator< allowed cycles of classes such that x < y < z < x, meaning that a list of them cannot be correctly sorted, and the sort order could differ with different standard libraries. The original implementation sorted classes by ValueName if they were otherwise equal. This isn't strictly necessary, but some backends seem to accidentally rely on it. If I reverse this comparison I get 8 test failures spread across the AArch64, Mips and X86 backends, so I have left it in until those backends can be fixed. There was one case in the X86 backend where the observable behaviour of the assembler is changed by this patch. This was because some of the memory asm operands were not marked as children of X86MemAsmOperand. Differential Revision: http://reviews.llvm.org/D16141 llvm-svn: 258677
* [TableGen] In AsmWriterEmitter unique command search, rather than storing a ↵Craig Topper2016-01-241-43/+32
| | | | | | | | mapping from instruction to unique command, instead store a list of which instructions each unique command corresponds to. This simplifies the complexity of the code that tries to find further operands to merge into the unique command. llvm-svn: 258656
* [TableGen] Make a class member local to the function that populates it and ↵Craig Topper2016-01-221-1/+2
| | | | | | consumes it later. NFC llvm-svn: 258490
* [TableGen] Reorder fields in AsmWriterOperand to remove padding and reduce ↵Craig Topper2016-01-221-6/+5
| | | | | | size. NFC llvm-svn: 258489
* [TableGen] Remove the CGIOpNo from AsmWriterOperand as its not used for ↵Craig Topper2016-01-222-8/+3
| | | | | | anything. NFC llvm-svn: 258488
* [GlobalISel] Add a generic machine opcode for ADD.Quentin Colombet2016-01-201-0/+5
| | | | | | | | | | | The selection process being split into separate passes, we need generic opcodes to translate the LLVM IR to target independent code. This patch adds an opcode for addition: G_ADD. Differential Revision: http://reviews.llvm.org/D15472 llvm-svn: 258333
* [TableGen] Merge the SuperClass Record and SMRange vector into a single ↵Craig Topper2016-01-181-4/+3
| | | | | | vector. This removes the state needed to manage the extra vector thus reducing the size of the Record class. NFC llvm-svn: 258065
* [TableGen] Keep a returned const reference instead of making a copy. NFCCraig Topper2016-01-171-1/+1
| | | | llvm-svn: 258020
* [TableGen] Replace instructions() with getInstructionsByEnumValue(). No need ↵Craig Topper2016-01-175-11/+8
| | | | | | to make an iterator_range when we already have a function that returns an ArrayRef. NFC llvm-svn: 258019
* [TableGen] Return ArrayRef instead of a std::vector reference from ↵Craig Topper2016-01-173-19/+19
| | | | | | getInstructionsByEnumValue(). NFC llvm-svn: 258018
* [TableGen] Use std::find instead of a manual loop. NFCCraig Topper2016-01-171-3/+1
| | | | llvm-svn: 258017
* [TableGen] Use a StringRef instead of creating a new std::string. It gets ↵Craig Topper2016-01-171-3/+2
| | | | | | passed to a function that takes a StringRef anyway. NFC llvm-svn: 258007
* [TableGen] Changes to AsmWriterEmitter to remove the CodeGenInstruction to ↵Craig Topper2016-01-173-70/+49
| | | | | | | | AsmWriterInst map. NFC Adds the corresponding CodeGenInstruction number to each AsmWriterInst. Then write all the operand uniqueing loops using the AsmWriterInst array and indices. Then use the CodeGenInstruction index to fill out the OpCodeInfo array. llvm-svn: 258005
* [TableGen] Use std::find instead of a manual loop. NFCCraig Topper2016-01-171-10/+8
| | | | llvm-svn: 258004
* [TableGen] Pass PassSubtarget flag into getCode instead of storing a copy of ↵Craig Topper2016-01-143-32/+25
| | | | | | the flag in every AsmWriterOperand. NFC llvm-svn: 257743
* [TableGen] Cleanup output formatting and add llvm_unreachables to the output ↵Craig Topper2016-01-131-5/+6
| | | | | | the AsmMatcher uses when it overflows the 64-bit tables. No in tree targets use this code, but I tested it with an temporarily reduced table width. llvm-svn: 257583
* [TableGen] Replace some hardcoded assumptions that the OpcodeInfo table is ↵Craig Topper2016-01-131-8/+10
| | | | | | 64-bits for cleanliness. NFC llvm-svn: 257582
* [TableGen] Use std::remove_if instead of an n^2 loop. NFCCraig Topper2016-01-131-8/+5
| | | | llvm-svn: 257581
* [TableGen] Fix up some stale comments in the AsmMatcher. NFCCraig Topper2016-01-131-4/+2
| | | | llvm-svn: 257580
* [TableGen] Move calls to getValueAsInt out of a loop since they aren't ↵Craig Topper2016-01-131-2/+3
| | | | | | simple functions. NFC llvm-svn: 257579
* [TableGen] Allow asm writer to use up to 3 OpInfo tables instead of 2. This ↵Craig Topper2016-01-111-30/+32
| | | | | | | | allows x86 to use 56 total bits made up of a 32-bit, 16-bit, and 8-bit table. Previously we were using 64 total bits. This saves 14K from the x86 table size. And saves space on other targets as well. llvm-svn: 257315
* [TableGen] Remove unnecessary 0 terminator from an array that only existed ↵Craig Topper2016-01-111-4/+0
| | | | | | to prevent ending an array with a comma. But that's perfectly legal and not something we need to prevent. NFC llvm-svn: 257314
* [TableGen] Remove a few spaces from AsmMatcher output. NFCCraig Topper2016-01-111-3/+3
| | | | llvm-svn: 257308
* [TableGen] Use range-based for loops. Also fix one loop to not use some ↵Craig Topper2016-01-081-25/+20
| | | | | | index name as an outer loop. NFC llvm-svn: 257156
* [TableGen] Combine variable declaration and initialization. Move a string ↵Craig Topper2016-01-081-3/+2
| | | | | | into a vector instead of copying. NFC llvm-svn: 257155
* [TableGen] Call llvm_shutdown on exit so that all the ManagedStatic objects ↵Craig Topper2016-01-041-0/+3
| | | | | | in the support library will be deleted. llvm-svn: 256732
* [TableGen] Simplify some code slightly. No need to check if the arrays are ↵Craig Topper2016-01-031-18/+10
| | | | | | empty before printing. The loop can be made to print the same thing if the loop is empty. NFC llvm-svn: 256703
* [TableGen] Replace a logically negated xor of bools with just an equality ↵Craig Topper2016-01-031-1/+1
| | | | | | comparison for readability. NFC llvm-svn: 256699
* [TableGen] Use std::find_if and a lambda instead of manual loops.Craig Topper2016-01-031-9/+10
| | | | llvm-svn: 256698
* [TableGen] Fix a bug introduced in r256627. If the switch was not emitted we ↵Craig Topper2016-01-031-2/+3
| | | | | | still emitted a closing curly brace. llvm-svn: 256697
* [TableGen] Use range-based for loops. NFCCraig Topper2016-01-031-20/+13
| | | | llvm-svn: 256696
* [TableGen] Modify the AsmMatcherEmitter to only apply the table growth from ↵Craig Topper2015-12-311-63/+110
| | | | | | | | | | | | | | r252440 to the Hexagon target. This restores the previous behavior of not including the mnemonic in the classes table for every target that starts instruction lines with the mnemonic. Not only did the table size increase by 1 entry, but the class enum increased in size which caused every class in the array to increase in size. It also grew the size of the function that parsers tokens into classes by a substantial amount. This adds a new HasMnemonicFirst flag to all AsmParsers. It's set to 1 by default and Hexagon target overrides it to 0. For the X86 target alone this recovers 324KB of size on the llvm-mc executable. I believe the current state is still a bad design choice for the Hexagon target as it causes most of the parsing to do a linear search through the entire match table to comparing operands against every instruction until it finds one that works. At least for the other targets we do a binary search based on mnemonic over which to do the linear scan. llvm-svn: 256669
* [TableGen] Use range-based for loops. NFCCraig Topper2015-12-311-8/+3
| | | | llvm-svn: 256668
* [TableGen] Move determination of IsIsolatedToken into the tokenizer instead ↵Craig Topper2015-12-311-31/+33
| | | | | | of trying to search characters around the token. No functional change intended. Verified for in-tree targets. llvm-svn: 256660
* [TableGen] Remove unnecessary conversion from StringRef to std::string when ↵Craig Topper2015-12-301-2/+2
| | | | | | outputting to a raw_ostream. NFC llvm-svn: 256628
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