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path: root/llvm/utils/TableGen/X86RecognizableInstr.h
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* fix trivial typos in comments; NFCHiroshi Inoue2017-07-041-1/+1
* [X86] Moving X86Local namespace from .cpp to .h file to use it in memory fold...Ayman Musa2017-05-111-0/+122
* [X86][AVX] Extend hasVEX_WPrefix bit to accept WIG value (W Ignore) + update ...Ayman Musa2017-02-201-2/+2
* [X86] Create a new instruction format to handle 4VOp3 encoding. This saves on...Craig Topper2016-08-221-2/+0
* [X86] Create a new instruction format to handle MemOp4 encoding. This saves o...Craig Topper2016-08-221-2/+0
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
* [TableGen] Stop passing by reference an integer that doesn't get modified. NFCCraig Topper2016-02-161-1/+1
* [TableGen] Remove unused member variable. NFCCraig Topper2016-02-161-2/+0
* [X86] Remove the single AdSize indicator and replace it with separate AdSize1...Craig Topper2014-12-241-2/+2
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* [X86] AVX512: Add disassembler support for compressed displacementAdam Nemet2014-07-171-0/+5
* [x86] Switch PAUSE instruction to use XS prefix instead of HasREPPrefix. Remo...Craig Topper2014-02-201-2/+0
* Remove unused method declaration.Craig Topper2014-02-131-3/+0
* Remove filtering concept from X86 disassembler table generation. It's no long...Craig Topper2014-02-131-19/+0
* Remove special case filtering for instructions with lock prefix as they are a...Craig Topper2014-02-121-2/+0
* TableGen/X86RecognizableInstr.h: Prune out-of-date "@param isSSE". [-Wdocumen...NAKAMURA Takumi2014-02-021-4/+0
* Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...Craig Topper2014-02-021-30/+25
* Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field i...Craig Topper2014-02-021-8/+6
* Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the T...Craig Topper2014-01-311-2/+4
* Move REP out of the Prefix field of the X86 format. Give it its own bit. It h...Craig Topper2014-01-311-0/+2
* Simplify x86 disassembler table handling of when to use TYPE_Rv/TYPE_R16/TYPE...Craig Topper2014-01-151-3/+3
* The rest of r198588. Remove SegOvrBits from X86 TSFlags since they weren't be...Craig Topper2014-01-061-2/+0
* Add a new x86 specific instruction flag to force some isCodeGenOnly instructi...Craig Topper2014-01-051-1/+3
* Remove unused HasFROperands field from disassembler.Craig Topper2014-01-021-3/+0
* Remove unused function argument.Craig Topper2014-01-021-3/+1
* AVX-512: added VPCONFLICT instruction and intrinsics,Elena Demikhovsky2013-11-031-0/+2
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-281-0/+10
* Sort the #include lines for utils/...Chandler Carruth2012-12-041-5/+3
* Remove code for setting the VEX L-bit as a function of operand size from the ...Craig Topper2012-09-191-4/+1
* Fix Doxygen issues:Dmitri Gribenko2012-09-131-8/+8
* Fix a bunch of -Wdocumentation warnings.Dmitri Gribenko2012-08-231-1/+1
* Update GATHER instructions to support 2 read-write operands. Patch from mysel...Craig Topper2012-07-121-1/+1
* X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by ...Craig Topper2012-02-271-0/+2
* Add FMA4 instructions to disassembler.Craig Topper2011-12-301-1/+3
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-161-2/+2
* Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3...Craig Topper2011-10-161-1/+3
* Add support in the disassembler for ignoring the L-bit on certain VEX instruc...Craig Topper2011-10-041-0/+2
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-1/+1
* Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes...Craig Topper2011-09-231-1/+3
* Make the disassembler able to disassemble a bunch of instructions with names ...Eli Friedman2011-07-161-0/+2
* X86 table-generator and disassembler support for the AVXSean Callanan2011-03-151-1/+15
* I swear I did a make clean and make before committing all this...Michael J. Spencer2010-11-291-1/+1
* factor the operand list (and related fields/operations) out of Chris Lattner2010-11-011-1/+2
* Reapply r105521, this time appending "LLU" to 64 bitBruno Cardoso Lopes2010-06-081-0/+2
* revert r105521, which is breaking the buildbots with stuff like this:Chris Lattner2010-06-051-2/+0
* Initial AVX support for some instructions. No patterns matchedBruno Cardoso Lopes2010-06-051-0/+2
* Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit Sean Callanan2009-12-191-0/+237
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