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path: root/llvm/utils/TableGen/TableGenBackends.h
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* [TableGen] Remove unused target intrinsic generation logicReid Kleckner2019-12-111-4/+2
* [TableGen] Add backend to generate command guide for tools using libOption.Jonas Devlieghere2019-11-221-0/+1
* [TableGen] Introduce a generic automaton (DFA) backendJames Molloy2019-10-041-0/+1
* [gicombiner] Add the boring boilerplate for the declarative combinerDaniel Sanders2019-10-021-0/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [MCSched] Bind PFM Counters to the CPUs instead of the SchedModel.Clement Courbet2018-10-251-0/+1
* [WebAssembly][NFC] Remove WebAssemblyStackifier TableGen backendThomas Lively2018-10-221-1/+0
* [WebAssembly] TableGen backend for stackifying instructionsThomas Lively2018-08-271-0/+1
* [IR] Split Intrinsics.inc into enums and implementationsReid Kleckner2018-06-231-1/+4
* [RISCV] Tablegen-driven Instruction Compression.Sameer AbuAsal2018-04-061-0/+1
* [Docs] Add tablegen backend for target opcode documentationOliver Stannard2017-11-141-0/+1
* [X86][TableGen] Recommitting the X86 memory folding tables TableGen backend w...Ayman Musa2017-10-081-0/+1
* [x86] Revert the X86FoldTablesEmitter due to more miscompiles.Chandler Carruth2017-06-061-1/+0
* Resubmit "[X86] Adding new LLVM TableGen backend that generates the X86 backe...Zachary Turner2017-05-291-0/+1
* Revert "[X86] Adding new LLVM TableGen backend that generates the X86 backend...Zachary Turner2017-05-291-1/+0
* [X86] Adding new LLVM TableGen backend that generates the X86 backend memory ...Ayman Musa2017-05-281-0/+1
* [X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX c...Ayman Musa2017-03-071-0/+1
* Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-191-0/+1
* Re-revert: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-181-1/+0
* Re-commit: [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-181-0/+1
* Revert r292132: [globalisel] Tablegen-erate current Register Bank Information...Daniel Sanders2017-01-161-1/+0
* [globalisel] Tablegen-erate current Register Bank InformationDaniel Sanders2017-01-161-0/+1
* [GlobalISel] Add basic Selector-emitter tblgen backend.Ahmed Bougacha2016-12-211-0/+1
* AArch64: TableGenerate system instruction operands.Tim Northover2016-07-051-0/+1
* Move the enum attributes defined in Attributes.h to a table-gen file.Akira Hatanaka2015-11-111-0/+1
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-0/+4
* Add TableGen ctags(1) emitter and helper script.Sean Silva2013-03-211-0/+1
* Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky2012-12-191-1/+0
* Copy clang/Driver/<Option parsing stuff> to llvm.Michael J. Spencer2012-12-051-0/+1
* add TableGen support to create relationship maps between instructionsSebastian Pop2012-10-251-0/+1
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-111-0/+78
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