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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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/
llvm
/
utils
/
TableGen
/
CodeGenInstruction.h
Commit message (
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Author
Age
Files
Lines
*
spell this variable right
Chris Lattner
2005-08-26
1
-1
/
+1
*
Expose a new flag to TargetInstrInfo
Chris Lattner
2005-08-26
1
-0
/
+1
*
For now, just emit empty operand info structures.
Chris Lattner
2005-08-19
1
-0
/
+1
*
Figure out how many operands each instruction has, keep track of whether
Chris Lattner
2005-08-18
1
-2
/
+5
*
Remove trailing whitespace
Misha Brukman
2005-04-22
1
-3
/
+3
*
Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.
Chris Lattner
2005-01-02
1
-0
/
+2
*
Add support for the isLoad and isStore flags, needed by the instruction sched...
Nate Begeman
2004-09-28
1
-0
/
+2
*
Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG
Chris Lattner
2004-09-28
1
-0
/
+1
*
Make the AsmWriter a first-class tblgen object. Allow targets to specify
Chris Lattner
2004-08-14
1
-1
/
+1
*
Start parsing more information from the Operand information
Chris Lattner
2004-08-11
1
-5
/
+25
*
Parse the operand list of the instruction. We currently support register and...
Chris Lattner
2004-08-01
1
-1
/
+18
*
Add, and start using, the CodeGenInstruction class. This class represents
Chris Lattner
2004-08-01
1
-0
/
+49