| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. | Dan Gohman | 2008-12-03 | 1 | -1/+1 |
| * | Add a flag to indicate that an instruction is as cheap (or cheaper) than a move | Bill Wendling | 2008-05-28 | 1 | -1/+4 |
| * | Remove isImplicitDef TargetInstrDesc flag. | Evan Cheng | 2008-03-15 | 1 | -1/+0 |
| * | Start inferring side effect information more aggressively, and fix many bugs ... | Chris Lattner | 2008-01-10 | 1 | -2/+1 |
| * | add a mayLoad property for machine instructions, a correlary to mayStore. | Chris Lattner | 2008-01-08 | 1 | -1/+1 |
| * | rename hasVariableOperands() -> isVariadic(). Add some comments. | Chris Lattner | 2008-01-07 | 1 | -1/+1 |
| * | the name field of instructions is never set to a non-empty string, | Chris Lattner | 2008-01-07 | 1 | -5/+0 |
| * | rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | rename isStore -> mayStore to more accurately reflect what it captures. | Chris Lattner | 2008-01-06 | 1 | -1/+1 |
| * | Split the impl of CodeGenInstruction out to its own .cpp file, add a getName(... | Chris Lattner | 2008-01-06 | 1 | -1/+5 |
| * | remove attributions from utils. | Chris Lattner | 2007-12-29 | 1 | -2/+2 |
| * | Add flags to indicate that there are "never" side effects or that there "may be" | Bill Wendling | 2007-12-14 | 1 | -0/+2 |
| * | Oops. Forgot these. | Evan Cheng | 2007-12-13 | 1 | -0/+1 |
| * | Add a flag for indirect branch instructions. | Owen Anderson | 2007-11-12 | 1 | -0/+1 |
| * | No need for noResults anymore. | Evan Cheng | 2007-07-20 | 1 | -1/+0 |
| * | Change instruction description to split OperandList into OutOperandList and | Evan Cheng | 2007-07-19 | 1 | -0/+4 |
| * | Try committing again. Add OptionalDefOperand. Remove clobbersPred. | Evan Cheng | 2007-07-10 | 1 | -1/+1 |
| * | Revert the earlier change that removed the M_REMATERIALIZABLE machine | Dan Gohman | 2007-06-26 | 1 | -0/+1 |
| * | Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad | Dan Gohman | 2007-06-19 | 1 | -1/+0 |
| * | Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. | Evan Cheng | 2007-06-19 | 1 | -0/+1 |
| * | Add clobbersPred - instruction that clobbers condition code / register which ... | Evan Cheng | 2007-06-06 | 1 | -0/+1 |
| * | Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable wit... | Evan Cheng | 2007-05-16 | 1 | -1/+1 |
| * | Recognize target instruction flag 'isReMaterializable'. | Evan Cheng | 2007-03-19 | 1 | -0/+1 |
| * | Remove the isTwoAddress property from the CodeGenInstruction class. It should | Chris Lattner | 2006-11-15 | 1 | -1/+24 |
| * | ADd support for adding constraints to suboperands | Chris Lattner | 2006-11-15 | 1 | -2/+18 |
| * | simplify the way operand flags and constraints are handled, making it easier | Chris Lattner | 2006-11-06 | 1 | -8/+3 |
| * | recognize ppc's blr instruction as predicated | Chris Lattner | 2006-11-06 | 1 | -0/+1 |
| * | Unbreak VC++ build. | Jeff Cohen | 2006-11-05 | 1 | -1/+2 |
| * | Add operand constraints to TargetInstrInfo. | Evan Cheng | 2006-11-01 | 1 | -0/+8 |
| * | * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and | Evan Cheng | 2006-01-09 | 1 | -2/+0 |
| * | Added field noResults to Instruction. | Evan Cheng | 2005-12-26 | 1 | -0/+1 |
| * | * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG | Evan Cheng | 2005-12-23 | 1 | -0/+2 |
| * | * Commit the fix (by Chris) for a tblgen type inferencing bug. | Evan Cheng | 2005-12-04 | 1 | -0/+1 |
| * | Nuke CodeGenInstruction's ValueType member, it is no longer used. | Nate Begeman | 2005-12-01 | 1 | -9/+3 |
| * | fit into 80 columns | Nate Begeman | 2005-11-30 | 1 | -2/+2 |
| * | Teach tblgen about instruction operands that have multiple MachineInstr | Chris Lattner | 2005-11-19 | 1 | -2/+9 |
| * | spell this variable right | Chris Lattner | 2005-08-26 | 1 | -1/+1 |
| * | Expose a new flag to TargetInstrInfo | Chris Lattner | 2005-08-26 | 1 | -0/+1 |
| * | For now, just emit empty operand info structures. | Chris Lattner | 2005-08-19 | 1 | -0/+1 |
| * | Figure out how many operands each instruction has, keep track of whether | Chris Lattner | 2005-08-18 | 1 | -2/+5 |
| * | Remove trailing whitespace | Misha Brukman | 2005-04-22 | 1 | -3/+3 |
| * | Expose isConvertibleToThreeAddress and isCommutable bits to the code generator. | Chris Lattner | 2005-01-02 | 1 | -0/+2 |
| * | Add support for the isLoad and isStore flags, needed by the instruction sched... | Nate Begeman | 2004-09-28 | 1 | -0/+2 |
| * | Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG | Chris Lattner | 2004-09-28 | 1 | -0/+1 |
| * | Make the AsmWriter a first-class tblgen object. Allow targets to specify | Chris Lattner | 2004-08-14 | 1 | -1/+1 |
| * | Start parsing more information from the Operand information | Chris Lattner | 2004-08-11 | 1 | -5/+25 |
| * | Parse the operand list of the instruction. We currently support register and... | Chris Lattner | 2004-08-01 | 1 | -1/+18 |
| * | Add, and start using, the CodeGenInstruction class. This class represents | Chris Lattner | 2004-08-01 | 1 | -0/+49 |
