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path: root/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
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* add a new TGError class and use it to propagate location info withChris Lattner2009-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | errors when thrown. This gets us nice errors like this from tblgen: CMOVL32rr: (set GR32:i32:$dst, (X86cmov GR32:$src1, GR32:$src2)) /Users/sabre/llvm/Debug/bin/tblgen: error: Included from X86.td:116: Parsing X86InstrInfo.td:922: In CMOVL32rr: X86cmov node requires exactly 4 operands! def CMOVL32rr : I<0x4C, MRMSrcReg, // if <s, GR32 = GR32 ^ instead of just: CMOVL32rr: (set GR32:i32:$dst, (X86cmov GR32:$src1, GR32:$src2)) /Users/sabre/llvm/Debug/bin/tblgen: In CMOVL32rr: X86cmov node requires exactly 4 operands! This is all I plan to do with this, but it should be easy enough to improve if anyone cares (e.g. keeping more loc info in "dag" expr records in tblgen. llvm-svn: 66898
* Reapply 63765. Patches for clang and llvm-gcc to follow.Dale Johannesen2009-02-051-1/+2
| | | | llvm-svn: 63812
* Reverting 63765. This broke the build of both clangDale Johannesen2009-02-041-2/+1
| | | | | | and llvm-gcc. llvm-svn: 63786
* New feature: add support for target intrinsics being defined in theNate Begeman2009-02-041-1/+2
| | | | | | | | | target directories themselves. This also means that VMCore no longer needs to know about every target's list of intrinsics. Future work will include converting the PowerPC target to this interface as an example implementation. llvm-svn: 63765
* Fix PR3453 and probably a bunch of other potentialDuncan Sands2009-02-011-1/+1
| | | | | | | | | crashes or wrong code with codegen of large integers: eliminate the legacy getIntegerVTBitMask and getIntegerVTSignBit methods, which returned their value as a uint64_t, so couldn't handle huge types. llvm-svn: 63494
* Handle iAny and fAny types in TreePatternNode::UpdateNodeType.Bob Wilson2009-01-051-5/+7
| | | | llvm-svn: 61713
* Fix spelling in some comments.Bob Wilson2009-01-051-1/+1
| | | | llvm-svn: 61702
* Mark x86's V_SET0 and V_SETALLONES with isSimpleLoad, and teach X86'sDan Gohman2008-12-031-9/+0
| | | | | | | | | | | | foldMemoryOperand how to "fold" them, by converting them into constant-pool loads. When they aren't folded, they use xorps/cmpeqd, but for example when register pressure is high, they may now be folded as memory operands, which reduces register pressure. Also, mark V_SET0 isAsCheapAsAMove so that two-address-elimination will remat it instead of copying zeros around (V_SETALLONES was already marked). llvm-svn: 60461
* Add a sanity-check to tablegen to catch the case where isSimpleLoadDan Gohman2008-12-031-0/+9
| | | | | | | | | is set but mayLoad is not set. Fix all the problems this turned up. Change code to not use isSimpleLoad instead of mayLoad unless it really wants isSimpleLoad. llvm-svn: 60459
* Modify the intrinsics pattern to separate out the "return" types from theBill Wendling2008-11-131-8/+13
| | | | | | | | | | "parameter" types. An intrinsic can now return a multiple return values like this: def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; llvm-svn: 59237
* Add support for having multiple predicates on a TreePatternNode.Dan Gohman2008-10-151-14/+33
| | | | | | | | This will allow predicates to be composed, which will allow the predicate definitions to become less redundant, and eventually will allow DAGISelEmitter.cpp to emit less redundant code. llvm-svn: 57562
* Factor out the predicate check code from DAGISelEmitter.cppDan Gohman2008-08-221-0/+27
| | | | | | | | | and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. llvm-svn: 55156
* Added support for overloading intrinsics (atomics) based on pointersMon P Wang2008-07-301-5/+8
| | | | | | | to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
* check in anton's patch to make inlining happen in a determinstic orderChris Lattner2008-06-301-4/+6
| | | | | | | and fix the bug that it uncovers: inlining a pattern fragment could bring in other pattern fragments if the inlinee hadn't already been inlined. llvm-svn: 52888
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-251-0/+2
| | | | | | | | Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub llvm-svn: 52706
* - Add "Commutative" property to intrinsics. This allows tblgen to generate ↵Evan Cheng2008-06-161-5/+31
| | | | | | | | the commuted variants for dagisel matching code. - Mark lots of X86 intrinsics as "Commutative" to allow load folding. llvm-svn: 52353
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-74/+91
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Teach the DAGISelEmitter to not compute the variable_ops operandDan Gohman2008-05-311-2/+0
| | | | | | | | | | | index for the input pattern in terms of the output pattern. Instead keep track of how many fixed operands the input pattern actually has, and have the input matching code pass the output-emitting function that index value. This simplifies the code, disentangles variables_ops from the support for predication operations, and makes variable_ops more robust. llvm-svn: 51808
* Fix a tblgen problem handling variable_ops in tblgen instructionDan Gohman2008-05-291-0/+2
| | | | | | | | | | | | definitions. This adds a new construct, "discard", for indicating that a named node in the input matching pattern is to be discarded, instead of corresponding to a node in the output pattern. This allows tblgen to know where the arguments for the varaible_ops are supposed to begin. This fixes "rdar://5791600", whatever that is ;-). llvm-svn: 51699
* Move instruction flag inference out of InstrInfoEmitter and intoDan Gohman2008-04-031-1/+147
| | | | | | | | | | | | CodeGenDAGPatterns, where it can be used in other tablegen backends. This allows the inference to be done for DAGISelEmitter so that it gets accurate mayLoad/mayStore/isSimpleLoad flags. This brings MemOperand functionality back to where it was before 48329. However, it doesn't solve the problem of anonymous patterns which expand to code that does loads or stores. llvm-svn: 49123
* detabify llvm, patch by Mike Stump!Chris Lattner2008-03-201-3/+3
| | | | llvm-svn: 48577
* Recommitting changes after more testing. These appear to cause no problems.Christopher Lamb2008-03-111-1/+7
| | | | llvm-svn: 48222
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-101-7/+1
| | | | llvm-svn: 48167
* Revert accidentally committed local changes.Christopher Lamb2008-03-101-2/+2
| | | | llvm-svn: 48126
* Add support in TableGen for unknown operands that infer their type from the ↵Christopher Lamb2008-03-101-3/+9
| | | | | | pattern their used in. This will be used to allow insert/extract subreg patterns in .td files! llvm-svn: 48125
* This patch fixes a problem encountered by the CellSPU backend where variantsScott Michel2008-03-051-52/+125
| | | | | | | | | | | | | | were being pruned in patterns where a variable was used more than once, e.g.: (or (and R32C:$rA, R32C:$rC), (and R32C:$rB, (not R32C:$rC))) In this example, $rC is used more than once and is actually significant to instruction selection pattern matching when commuted variants are produced. This patch scans the pattern's clauses and collects the variables, creating a set of variables that are used more than once. TreePatternNode::isIsomorphicTo() also understands that multiply-used variables are significant. llvm-svn: 47950
* De-tabify.Bill Wendling2008-02-261-12/+12
| | | | llvm-svn: 47595
* Unbreak build with gcc 4.3: provide missed includes and silence most ↵Anton Korobeynikov2008-02-201-2/+2
| | | | | | annoying warnings. llvm-svn: 47367
* Make tblgen a little smarter about constants smaller than i32. Currently,Scott Michel2008-02-151-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | tblgen will complain if a sign-extended constant does not fit into a data type smaller than i32, e.g., i16. This causes a problem when certain hex constants are used, such as 0xff for byte masks or immediate xor values. tblgen will try the sign-extended value first and, if the sign extended value would overflow, it tries to see if the unsigned value will fit. Consequently, a software developer can now safely incant: (XORHIr16 R16C:$rA, 0xffff) which is somewhat clearer and more informative than incanting: (XORHIr16 R16C:$rA, (i16 -1)) even if the two are bitwise equivalent. Tblgen also outputs the 64-bit unsigned constant in the generated ISel code when getTargetConstant() is invoked. llvm-svn: 47188
* Tablegen support for insert & extract element matchingNate Begeman2008-02-091-0/+17
| | | | llvm-svn: 46901
* Add files to windows project files. Also include <algorithm> explicitly so ↵Chuck Rose III2008-01-151-0/+1
| | | | | | that vstudio build works llvm-svn: 46013
* start inferring 'no side effects'.Chris Lattner2008-01-101-0/+2
| | | | llvm-svn: 45822
* realize that instructions who match intrinsics that read memory read memory.Chris Lattner2008-01-101-0/+2
| | | | | | Also, instructions with any nodes that are SDNPMayLoad also read memory. llvm-svn: 45817
* Change the 'isStore' inferrer to look for 'SDNPMayStore' Chris Lattner2008-01-061-0/+2
| | | | | | | | | | | instead of "ISD::STORE". This allows us to mark target-specific dag nodes as storing (such as ppc byteswap stores). This allows us to remove more explicit isStore flags from the .td files. Finally, add a warning for when a .td file contains an explicit isStore and tblgen is able to infer it. llvm-svn: 45654
* set the 'isstore' flag for instructions whose pattern is an Chris Lattner2008-01-061-11/+22
| | | | | | intrinsic that writes to memory. llvm-svn: 45650
* improve const correctness.Chris Lattner2008-01-061-1/+1
| | | | llvm-svn: 45646
* rename CodegenDAGPatterns -> CodeGenDAGPatternsChris Lattner2008-01-061-23/+23
| | | | llvm-svn: 45641
* fix build on case sensitive file systems.Chris Lattner2008-01-051-3/+1
| | | | llvm-svn: 45639
* move Node Transformation printing from CodeGenDAGPatterns -> DAGISelEmitter.Chris Lattner2008-01-051-19/+4
| | | | | | | The only difference in output is that we now print them in alphabetical order instead of reverse alphabetical order. llvm-svn: 45635
* move predicate printing code from CodeGenDAGPatterns -> DAGISelEmitter.Chris Lattner2008-01-051-33/+13
| | | | llvm-svn: 45634
* change getQualifiedName to be a global function.Chris Lattner2008-01-051-0/+2092
Split the pattern parsing code out from the dag isel emitter into it's own file. No functionality change. llvm-svn: 45632
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