summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/AsmWriterEmitter.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-111-3/+41
| | | | | | | | | The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! llvm-svn: 158311
* Revert "Replace some uses of std:map<std::string,...> with StringMap."Jim Grosbach2012-04-181-6/+6
| | | | | | | StringMap iterators are not deterministic, and that's more important here than speed or memory. llvm-svn: 155039
* Replace some uses of std:map<std::string,...> with StringMap.Jim Grosbach2012-04-181-6/+6
| | | | llvm-svn: 155037
* Use SmallVector for the requirements on an InstAlias.Jim Grosbach2012-04-181-1/+1
| | | | llvm-svn: 155034
* Tidy up. Formatting.Jim Grosbach2012-04-181-2/+3
| | | | llvm-svn: 155032
* Convert assert(false) followed by a return to llvm_unreachableCraig Topper2012-04-041-2/+1
| | | | llvm-svn: 153997
* Tidy up spacing in some tablegen outputs.Craig Topper2012-04-031-2/+2
| | | | llvm-svn: 153937
* Emit the asm writer's mnemonic table with SequenceToOffsetTable.Benjamin Kramer2012-04-021-6/+21
| | | | | | This way we can get AVX v-prefixed instructions tail merged with the normal insns. llvm-svn: 153869
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-021-49/+0
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
* Use SequenceToOffsetTable to generate instruction name table for AsmWriter.Craig Topper2012-04-021-25/+27
| | | | llvm-svn: 153857
* Rip out emission of the regIsInRegClass function for the asm printer.Benjamin Kramer2012-03-301-67/+3
| | | | | | It's slow, bloated and completely redundant with MCRegisterClass::contains. llvm-svn: 153782
* Use SequenceToOffsetTable in emitRegisterNameString.Jakob Stoklund Olesen2012-03-301-8/+14
| | | | | | This allows suffix sharing in register names. (AX is a suffix of EAX). llvm-svn: 153777
* Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."Jakob Stoklund Olesen2012-03-151-8/+3
| | | | | | | | We cannot limit the concatenated instruction names to 64K. ARM is already at 32K, and it is easy to imagine a target with more instructions. llvm-svn: 152817
* Revert r152105: "Use uint16_t to store indices into string table"Jakob Stoklund Olesen2012-03-151-5/+5
| | | | | | | | | | | This patch limited the concatenated register names to 64K which meant that the total number of registers was many times less than 64K. If any compilers actually enforce the 64K limit on string literals, and it turns out to be a problem, we should fix that problem by not using long string literals. llvm-svn: 152816
* Re-commit r152202 hopefully fixing the MSVC linker error.Craig Topper2012-03-081-3/+8
| | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152296
* Revert r152202 as it's causing internal buildbot failures.Chad Rosier2012-03-071-8/+3
| | | | | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152233
* Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to ↵Craig Topper2012-03-071-3/+8
| | | | | | protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152202
* Use uint16_t to store indices into string table since C++ only allows 64K ↵Craig Topper2012-03-061-5/+5
| | | | | | string literals so the index into the big string can never be larger than that. llvm-svn: 152105
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-1/+1
| | | | llvm-svn: 149814
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-1/+0
| | | | llvm-svn: 147855
* ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.Jim Grosbach2011-11-151-0/+7
| | | | | | rdar://10435076 llvm-svn: 144606
* TableGen: Privatize CodeGenRegisterClass::TheDef and Name.Jakob Stoklund Olesen2011-10-041-2/+2
| | | | | | | | When TableGen starts creating its own register classes, the synthesized classes won't have a Record reference. All register classes must have a name, though. llvm-svn: 141081
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-2/+2
| | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
* Switch to ArrayRef<CodeGenRegisterClass*>.Jakob Stoklund Olesen2011-09-291-4/+4
| | | | | | | This makes it possible to allocate CodeGenRegisterClass instances dynamically and reorder them. llvm-svn: 140816
* Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.Evan Cheng2011-07-061-146/+6
| | | | llvm-svn: 134457
* Change AsmName's type from StringRef to std::string. AsmName was pointing to ↵Francois Pichet2011-06-291-1/+1
| | | | | | | | | a temporary string object that was destroyed. This is undefined behavior and MSVC didn't like it. This fixes over 300+ failing tests on MSVC. Credit for this fix goes to chapuni. llvm-svn: 134064
* Add support for alternative register names, useful for instructions whose ↵Owen Anderson2011-06-271-26/+90
| | | | | | | | operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. llvm-svn: 133940
* Consolidate some TableGen diagnostic helper functions.Jim Grosbach2011-06-211-0/+1
| | | | | | | TableGen had diagnostic printers sprinkled about in a few places. Pull them together into a single location in Error.cpp. llvm-svn: 133568
* Store CodeGenRegisters as pointers so they won't be reallocated.Jakob Stoklund Olesen2011-06-181-2/+3
| | | | | | | Reuse the CodeGenRegBank DenseMap in a few places that would build their own or use linear search. llvm-svn: 133333
* Give CodeGenRegisterClass a real sorted member set.Jakob Stoklund Olesen2011-06-151-3/+3
| | | | | | | | | | | Make the Elements vector private and expose an ArrayRef through getOrder() instead. getOrder will eventually provide multiple user-specified allocation orders. Use the sorted member set for member and subclass tests. Clean up a lot of ad hoc searches. llvm-svn: 133040
* Improve the heuristic to emit the alias if the number of hard-coded registersBill Wendling2011-06-151-1/+23
| | | | | | are also greater than the alias. llvm-svn: 133038
* Heuristic: If the number of operands in the alias are more than the number ofBill Wendling2011-06-141-9/+25
| | | | | | operands in the aliasee, don't print the alias. llvm-svn: 132963
* Use a more efficient data structure for the "operand map". The number ofBill Wendling2011-05-231-7/+28
| | | | | | | operands to an instruction aren't great, so an iterative search is fairly quick and doesn't have the overhead of std::map. llvm-svn: 131886
* Invert the meaning of printAliasInstr's return value. It now returnsEric Christopher2011-04-181-4/+4
| | | | | | true on success and false on failure. Update callers. llvm-svn: 129722
* Add an option to not print the alias of an instruction. It defaults to "printBill Wendling2011-04-131-0/+2
| | | | | | the alias". llvm-svn: 129485
* Only emit the AvailableFeatures variable if it's used.Bill Wendling2011-04-081-4/+7
| | | | llvm-svn: 129124
* Replace the old algorithm that emitted the "print the alias for an instruction"Bill Wendling2011-04-071-146/+59
| | | | | | | | | | | | | with the newer, cleaner model. It uses the IAPrinter class to hold the information that is needed to match an instruction with its alias. This also takes into account the available features of the platform. There is one bit of ugliness. The way the logic determines if a pattern is unique is O(N**2), which is gross. But in reality, the number of items it's checking against isn't large. So while it's N**2, it shouldn't be a massive time sink. llvm-svn: 129110
* Call static functions so that they aren't left unused.Bill Wendling2011-03-211-2/+4
| | | | llvm-svn: 128020
* A WIP commit of the InstAlias printing cleanup. This code will soon replace theBill Wendling2011-03-211-19/+121
| | | | | | | code below it. Even though it looks very similar, it will match more precisely and geneate better functions in the long run. llvm-svn: 127991
* Add the IAPrinter class.Bill Wendling2011-03-211-0/+97
| | | | | | | This is a helper class that will make it easier to say which InstAliases can be printed and which cannot (because of ambiguity). llvm-svn: 127990
* * Add classes that support the "feature" information.Bill Wendling2011-03-211-5/+119
| | | | | | * Move the code that emits the reg in reg class matching into its own function. llvm-svn: 127988
* A new TableGen feature! (Not turned on just yet.)Bill Wendling2011-02-261-0/+249
| | | | | | | | | | | | | | | | | | | | InstAlias<{alias}, {aliasee}>; The InstAlias instruction should be able to go from the MCInst to the {alias}. All of the information is there to match the MCInst with the {aliasee}. From there, it's a simple matter to emit the {alias}, with the correct operands from the {aliasee}. The code this patch generates can be used by the InstPrinter to automatically print out the alias without having to write special C++ code to handle the situation. This is a WIP, and therefore are several limitations. For instance, it cannot handle AsmOperands at the moment. It also doesn't know what to do when two {alias}es match the same {aliasee}. (Currently, it just ignores those two cases and allows the printInstruction method to handle them.) llvm-svn: 126538
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-131-3/+3
| | | | llvm-svn: 121659
* Let a target specify whether it wants an assembly printer to be the MC versionJim Grosbach2010-09-301-1/+4
| | | | | | | | | or not. TableGen needs to generate the printInstruction() function as taking an MCInstr* or a MachineInstr*, depending. Default to the old non-MC version so that everything not yet using MC continues to just work without fidding. llvm-svn: 115126
* trailing whitespaceJim Grosbach2010-09-291-54/+54
| | | | llvm-svn: 115096
* Handle the odd case where we only have one instruction.Eric Christopher2010-09-181-0/+3
| | | | llvm-svn: 114293
* Update comment.Bill Wendling2010-07-161-1/+1
| | | | llvm-svn: 108571
* change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner2010-04-041-1/+1
| | | | | | member of AsmPrinter. Instead, pass it in explicitly. llvm-svn: 100306
* make inst_begin/inst_end iterate over InstructionsByEnumValue.Chris Lattner2010-03-191-3/+3
| | | | | | Use CodeGenTarget::getInstNamespace in one place and fix it. llvm-svn: 98915
* revert 98912Chris Lattner2010-03-191-3/+3
| | | | llvm-svn: 98914
OpenPOWER on IntegriCloud