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path: root/llvm/utils/TableGen/AsmWriterEmitter.cpp
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* remove attributions from utils.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45419
* Work around a bogus gcc 4.2 warning.Chris Lattner2007-07-181-1/+2
| | | | llvm-svn: 39993
* Files missing from LABEL check in.Jim Laskey2007-01-261-1/+4
| | | | llvm-svn: 33539
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-3/+2
| | | | llvm-svn: 32333
* Remove the isTwoAddress property from the CodeGenInstruction class. It shouldChris Lattner2006-11-151-8/+3
| | | | | | | | | | not be used for anything other than backwards compat constraint handling. Add support for a new DisableEncoding property which contains a list of registers that should not be encoded by the generated code emitter. Convert the codeemitter generator to use this, fixing some PPC JIT regressions. llvm-svn: 31769
* Unbreak VC++ build.Jeff Cohen2006-11-051-1/+2
| | | | llvm-svn: 31464
* This:Chris Lattner2006-09-271-2/+3
| | | | | | | | | | AggregateString += "\0\0"; Doesn't add two nuls to the AggregateString (for obvious reasons), which broke the asmprinter when the first character of an asm string was not literal text. llvm-svn: 30625
* Actually, name the method PrintSpecial to match other stuff in AsmPrinter.hChris Lattner2006-09-261-3/+3
| | | | llvm-svn: 30618
* Add support for ${:foo} syntax, where "foo" is passed into "printSpecial" andChris Lattner2006-09-261-16/+25
| | | | | | | has no associated operand. This is useful for portably encoding stuff like the comment character into an asm string. llvm-svn: 30617
* Fix a long-standing wart in the code generator: two-address instruction loweringChris Lattner2006-09-051-8/+5
| | | | | | | | | | | | | | | actually *removes* one of the operands, instead of just assigning both operands the same register. This make reasoning about instructions unnecessarily complex, because you need to know if you are before or after register allocation to match up operand #'s with the target description file. Changing this also gets rid of a bunch of hacky code in various places. This patch also includes changes to fold loads into cmp/test instructions in the X86 backend, along with a significant simplification to the X86 spill folding code. llvm-svn: 30108
* Fix a bug handling instructions, like blr, which just consist of a textChris Lattner2006-07-191-5/+11
| | | | | | string. The return value of printInstruction should be true for these. llvm-svn: 29196
* Fix case where identical cases were not detected across case #0, becauseChris Lattner2006-07-181-2/+3
| | | | | | | | instructions not handled would have a case value of #0, throwing things off. This marginally shrinks the X86 asmprinter, but shrinks the sparc asmwriter by 25 lines. llvm-svn: 29187
* Fix an accidentally duplicated line that caused tblgen to crash on itanium.Chris Lattner2006-07-181-3/+4
| | | | | | Add an assert that catches the real problem earlier. llvm-svn: 29185
* Maximally group commands. When all instructions within a command set have aChris Lattner2006-07-181-12/+68
| | | | | | | series of identical commands, handle them all with one switch. In the case of the x86 at&t asm printer, only 3 switches are needed for all instructions. llvm-svn: 29184
* Change generator to remove operands as it processes them. No change inChris Lattner2006-07-181-15/+21
| | | | | | generated file. llvm-svn: 29183
* Handle the last operand more intelligently. When emitting the \n, alsoChris Lattner2006-07-181-5/+7
| | | | | | | return from the asmprinter to make the generated asmprinter both more efficient and smaller. llvm-svn: 29182
* Emit switches with 1/2 cases as unconditional code or an if/then/else forChris Lattner2006-07-181-10/+24
| | | | | | tidyness. llvm-svn: 29181
* Steal bits from the asm string index to use for operand information. On bothChris Lattner2006-07-181-10/+12
| | | | | | | x86 and ppc, this gets us 4 more bits to play with, since the string indices both only use 12 bits. llvm-svn: 29180
* Merge operand info and asmstr idx into a single 32-bit field. No other change.Chris Lattner2006-07-181-16/+18
| | | | llvm-svn: 29179
* Completely change the structure of the generated asmprinter to be more tableChris Lattner2006-07-181-25/+187
| | | | | | | | | based and less switch-statements-with-hundreds-of-cases based. This shrinks the x86 asmprinters to about 1/3 their previous size. Other improvements coming. llvm-svn: 29177
* The generated index array should be const.Chris Lattner2006-07-141-1/+1
| | | | llvm-svn: 29155
* Emit the string information for the asm writer as a single large stringChris Lattner2006-07-141-36/+69
| | | | | | | | | | | | | | | | | | | and index into it, instead of emitting it like this: static const char * const OpStrs[] = { "PHINODE\n", // PHI 0, // INLINEASM "adc ", // ADC32mi "adc ", // ADC32mi8 ... The old way required thousands of relocations that slows down link time and dynamic load times. This also cuts about 10K off each of the X86 asmprinters, and should shrink the others as well. llvm-svn: 29152
* instructions can be in different namespaces. Make sure to use the rightChris Lattner2006-05-011-8/+4
| | | | | | one for each instruction. llvm-svn: 28038
* Add support for modifier strings in machine instr descriptions. This allowsChris Lattner2006-02-061-6/+38
| | | | | | | | | us to avoid creating lots of "Operand" types with different printers, instead we can fold several together and use modifiers. For example, we can now use: ${target:call} to say that the operand should be printed like a 'call' operand. llvm-svn: 26024
* Simplify the variant handling code, no functionality change.Chris Lattner2006-02-061-34/+17
| | | | llvm-svn: 26023
* add a note, ya knoeChris Lattner2006-02-011-0/+3
| | | | llvm-svn: 25880
* Use printInlineAsm to, well, print inline asm's.Chris Lattner2006-01-271-4/+7
| | | | llvm-svn: 25677
* No longer track value types for asm printer operands, and remove them asNate Begeman2005-11-301-12/+6
| | | | | | | an argument to every operand printing function. Requires some slight tweaks to x86, the only user. llvm-svn: 24541
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-4/+4
| | | | llvm-svn: 22523
* Fix PR595: These error messages should not be looking at CGI.Name, theyChris Lattner2005-07-151-9/+13
| | | | | | should be looking at CGI.TheDef->getName(). llvm-svn: 22445
* Add support for a TODO; instructions in .td files can now have argumentsNate Begeman2005-07-141-1/+24
| | | | | | | | printed as part of the opcode. This allows something like cmp${cc}ss in the x86 backed to be printed as cmpltss, cmpless, etc. depending on what the value of $cc is. llvm-svn: 22439
* Remove trailing whitespaceMisha Brukman2005-04-221-8/+8
| | | | llvm-svn: 21428
* Minor fix.Chris Lattner2005-01-221-1/+1
| | | | llvm-svn: 19761
* This is the final big of factoring. This shares cases in suboperandChris Lattner2005-01-221-8/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | differences, which means that identical instructions (after stripping off the first literal string) do not run any different code at all. On the X86, this turns this code: switch (MI->getOpcode()) { case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break; case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break; case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break; case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break; case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break; case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break; case X86::AND32mi: printOperand(MI, 4, MVT::i32); break; case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break; case X86::AND32mr: printOperand(MI, 4, MVT::i32); break; case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break; case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break; case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break; case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break; case X86::OR32mi: printOperand(MI, 4, MVT::i32); break; case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break; case X86::OR32mr: printOperand(MI, 4, MVT::i32); break; case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break; case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break; case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break; case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break; case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break; case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break; case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break; case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break; case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break; case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break; case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break; case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break; case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break; case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break; case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break; case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break; case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break; case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break; } into this: switch (MI->getOpcode()) { case X86::ADC32mi: case X86::ADC32mr: case X86::ADD32mi: case X86::ADD32mr: case X86::AND32mi: case X86::AND32mr: case X86::CMP32mi: case X86::CMP32mr: case X86::MOV32mi: case X86::MOV32mr: case X86::OR32mi: case X86::OR32mr: case X86::SBB32mi: case X86::SBB32mr: case X86::SHLD32mrCL: case X86::SHRD32mrCL: case X86::SUB32mi: case X86::SUB32mr: case X86::TEST32mi: case X86::TEST32mr: case X86::XCHG32mr: case X86::XOR32mi: case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break; case X86::ADC32mi8: case X86::ADD32mi8: case X86::AND32mi8: case X86::OR32mi8: case X86::ROL32mi: case X86::ROR32mi: case X86::SAR32mi: case X86::SBB32mi8: case X86::SHL32mi: case X86::SHR32mi: case X86::SUB32mi8: case X86::TEST8mi: case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break; } After this, the generated asmwriters look pretty much as though they were generated by hand. This shrinks the X86 asmwriter.inc files from 55101->39669 and 55429->39551 bytes each, and PPC from 16766->12859 bytes. llvm-svn: 19760
* Implement *even more* factoring. In particular, if all of the instructionChris Lattner2005-01-221-20/+62
| | | | | | | | | | | | | | | | | | strings starts out with a constant string, we emit the string first, using a table lookup (instead of a switch statement). Because this is usually the opcode portion of the asm string, the differences between the instructions have now been greatly reduced. This allows many more case statements to be grouped together. This patch also allows instruction cases to be grouped together when the instruction patterns are exactly identical (common after the opcode string has been ripped off), and when the differing operand is a MachineInstr operand that needs to be formatted. The end result of this is a mean and lean generated AsmPrinter! llvm-svn: 19759
* Fix VC++ compilation errorJeff Cohen2005-01-221-0/+1
| | | | llvm-svn: 19757
* Implement factoring of instruction pattern strings. In particular, instead ofChris Lattner2005-01-221-10/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | emitting code like this: case PPC::ADD: O << "add "; printOperand(MI, 0, MVT::i64); O << ", "; prin tOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << '\n '; break; case PPC::ADDC: O << "addc "; printOperand(MI, 0, MVT::i64); O << ", "; pr intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << ' \n'; break; case PPC::ADDE: O << "adde "; printOperand(MI, 0, MVT::i64); O << ", "; pr intOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << ' \n'; break; ... Emit code like this: case PPC::ADD: case PPC::ADDC: case PPC::ADDE: ... switch (MI->getOpcode()) { case PPC::ADD: O << "add "; break; case PPC::ADDC: O << "addc "; break; case PPC::ADDE: O << "adde "; break; ... } printOperand(MI, 0, MVT::i64); O << ", "; printOperand(MI, 1, MVT::i64); O << ", "; printOperand(MI, 2, MVT::i64); O << "\n"; break; This shrinks the PPC asm writer from 24785->15205 bytes (even though the new asmwriter has much more whitespace than the old one), and the X86 printers shrink quite a bit too. The important implication of this is that GCC no longer hits swap when building the PPC backend in optimized mode. Thus this fixes PR448. -Chris llvm-svn: 19755
* Fix the ::: problemChris Lattner2005-01-221-1/+1
| | | | llvm-svn: 19754
* Minor refactoring, no functionality change.Chris Lattner2005-01-221-15/+20
| | | | llvm-svn: 19753
* Seperate asmstring parsing from emission. This allows the code to be simplerChris Lattner2005-01-221-86/+153
| | | | | | | | | | | | | | | | | | | and more understandable. It also allows us to do simple things like fold consequtive literal strings together. For example, instead of emitting this for the X86 backend: O << "adc" << "l" << " "; we now generate this: O << "adcl "; *whoa* :) This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes for the intel/att asm writers respectively. llvm-svn: 19749
* make double-dollar properly escape asmstringsAndrew Lenharth2005-01-221-0/+1
| | | | llvm-svn: 19740
* Don't emit the method into the llvm namespace, let the #includer decide ↵Chris Lattner2004-10-121-2/+0
| | | | | | where it goes llvm-svn: 16934
* Correctly parse variant notationChris Lattner2004-10-031-6/+42
| | | | llvm-svn: 16637
* Do not #include files into the llvm namespaceChris Lattner2004-08-171-1/+2
| | | | llvm-svn: 15849
* Make the AsmWriter a first-class tblgen object. Allow targets to specifyChris Lattner2004-08-141-2/+9
| | | | | | name of the generated asmwriter class, and the name of the format string. llvm-svn: 15747
* Fix minor bug in previous checkinChris Lattner2004-08-111-4/+5
| | | | llvm-svn: 15649
* change how we invoke the printer. Instead of passing in the MO directly,Chris Lattner2004-08-111-1/+2
| | | | | | pass in the MI, operand number, and the type of the operand. llvm-svn: 15645
* Be pickyChris Lattner2004-08-011-1/+5
| | | | llvm-svn: 15400
* Add support for asm printing machine instructions that have operands.Chris Lattner2004-08-011-2/+48
| | | | llvm-svn: 15391
* Initial cut at an asm writer emitter. So far, this only handles emission ofChris Lattner2004-08-011-0/+48
instructions, and only instructions that take no operands at that! llvm-svn: 15386
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