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path: root/llvm/utils/TableGen/AsmWriterEmitter.cpp
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* [TableGen] Use range-based for loops. Also fix one loop to not use some ↵Craig Topper2016-01-081-25/+20
| | | | | | index name as an outer loop. NFC llvm-svn: 257156
* [TableGen] Combine variable declaration and initialization. Move a string ↵Craig Topper2016-01-081-3/+2
| | | | | | into a vector instead of copying. NFC llvm-svn: 257155
* [TableGen] Correct Namespace lookup with AltNames in AsmWriterEmitterHal Finkel2015-12-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | AsmWriterEmitter will generate a getRegisterName function with an alternate register name index as its second argument if the target makes use of them. The enum of these values is generated in RegisterInfoEmitter. The getRegisterName generator would assume the namespace could always be found by reading index 1 of the list of AltNameIndices, but this will fail if this list is sorted such that the NoRegAltName is at index 1. Because this list is sorted by record name (in CodeGenTarget::ReadRegAltNameIndices), you only run in to problems if your MyTargetRegisterInfo.td defines a single RegAltNameIndex that sorts lexically before NoRegAltName. For example, if a target has something like def AnAltNameIndex : RegAltNameIndex and defines RegAltNameIndices for some registers then, prior to this change, AsmWriterEmitter would generate references to ::AnAltNameIndex and ::NoRegAltName Patch by Alex Bradbury! llvm-svn: 255344
* [AArch64] Add ARMv8.2-A Statistical Profiling ExtensionOliver Stannard2015-12-011-5/+7
| | | | | | | | | | | | The Statistical Profiling Extension is an optional extension to ARMv8.2-A. Since it is an optional extension, I have added the FeatureSPE subtarget feature to control it. The assembler-visible parts of this extension are the new "psb csync" instruction, which is equivalent to "hint #17", and a number of system registers. Differential Revision: http://reviews.llvm.org/D15021 llvm-svn: 254401
* Remove and forbid raw_svector_ostream::flush() calls.Yaron Keren2015-08-131-1/+0
| | | | | | | | | | After r244870 flush() will only compare two null pointers and return, doing nothing but wasting run time. The call is not required any more as the stream and its SmallString are always in sync. Thanks to David Blaikie for reviewing. llvm-svn: 244928
* Fix memory leaks by avoiding extra manual dynamic allocationDavid Blaikie2015-08-061-57/+41
| | | | | | Improvement to r244212. llvm-svn: 244252
* Plug memory leaks in AsmWriterEmitter::EmitPrintAliasInstruction.Yaron Keren2015-08-061-0/+8
| | | | llvm-svn: 244212
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-291-3/+2
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* [MCInstPrinter] Enable MCInstPrinter to change its behavior based on theAkira Hatanaka2015-03-271-7/+20
| | | | | | | | | | | | | | | | | | | | per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. llvm-svn: 233411
* Teach raw_ostream to accept SmallString.Yaron Keren2015-03-101-1/+1
| | | | | | | | | | | | | | Saves adding .str() call to any raw_ostream << SmallString usage and a small step towards making .str() consistent in the ADTs by removing one of the SmallString::str() use cases, discussion at http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20141013/240026.html I'll update the Phabricator patch http://reviews.llvm.org/D6372 for review of the Twine SmallString support, it's more complex than this one. llvm-svn: 231763
* Replace size method call of containers to empty method where appropriateAlexander Kornienko2015-01-151-2/+2
| | | | | | | | | | | | | | | | This patch was generated by a clang tidy checker that is being open sourced. The documentation of that checker is the following: /// The emptiness of a container should be checked using the empty method /// instead of the size method. It is not guaranteed that size is a /// constant-time function, and it is generally more efficient and also shows /// clearer intent to use empty. Furthermore some containers may implement the /// empty method but not implement the size method. Using empty whenever /// possible makes it easier to switch to another container in the future. Patch by Gábor Horváth! llvm-svn: 226161
* On behalf of Matthew Wahab:Evgeny Astigeevich2014-12-161-1/+7
| | | | | | | | | | | | | | | | An instruction alias defined with InstAlias and an optional operand in the middle of the AsmString field, "..${a} <operands>", would get the final "}" printed in the instruction disassembly. This wouldn't happen if the optional operand appeared as the last item in the AsmString which is how the current backends avoided the problem. There don't appear to be any tests for this part of Tablegen but it passes the pre-commit tests. Manually tested the change by enabling the generic alias printer in the ARM backend and checking the output. Differential Revision: http://reviews.llvm.org/D6529 llvm-svn: 224348
* Remove indirection of vector<T*> in favor of deque<T>David Blaikie2014-11-291-6/+5
| | | | llvm-svn: 222958
* Use range-based for loops.Craig Topper2014-11-251-5/+3
| | | | llvm-svn: 222782
* Remove dead code.Craig Topper2014-11-251-2/+1
| | | | llvm-svn: 222781
* Remove unused MaxSize variable.Craig Topper2014-11-251-7/+0
| | | | llvm-svn: 222780
* Move a vector instead of copying it.Craig Topper2014-11-251-2/+2
| | | | llvm-svn: 222779
* Replace a comment that says 'unreachable' with llvm_unreachable in TableGen ↵Craig Topper2014-11-241-1/+1
| | | | | | AsmWriter output. llvm-svn: 222650
* Detect best type for some static index tables instead of just using uint32_t ↵Craig Topper2014-11-241-15/+24
| | | | | | to reduce total data size. llvm-svn: 222643
* TableGen: Add 'static' to a large array to avoid a huge stack allocationReid Kleckner2014-07-171-1/+1
| | | | | | | | Speculative fix for a -Wframe-larger-than warning from gcc. Clang will implicitly promote such constant arrays to globals, so in theory it won't hit this. llvm-svn: 213298
* Condition codes AL and NV are invalid in the aliases that useArtyom Skrobov2014-06-101-3/+46
| | | | | | | | | | | | | | inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM). Matching aliases based on "immediate classes", when disassembling, wasn't previously supported, hence adding MCOperandPredicate into class Operand, and implementing the support for it in AsmWriterEmitter. The parsing for those aliases was already custom, so just adding the missing condition into AArch64AsmParser::parseCondCode. llvm-svn: 210528
* Refactoring in AsmWriterEmitter::EmitPrintAliasInstruction()Artyom Skrobov2014-06-101-11/+6
| | | | llvm-svn: 210527
* TableGen: convert InstAlias's Emit bit to an int.Tim Northover2014-05-201-13/+31
| | | | | | | | | | | | | When multiple aliases overlap, the correct string to print can often be determined purely by considering the InstAlias declarations in some particular order. This allows the user to specify that order manually when desired, without resorting to hacking around with the default lexicographical order on Record instantiation, which is error-prone and ugly. I was also mistaken about "add w2, w3, w4" being the same as "add w2, w3, w4, uxtw". That's only true if Rn is the stack pointer. llvm-svn: 209199
* TableGen: fix operand counting for aliasesTim Northover2014-05-161-32/+7
| | | | | | | | | | | | | | | | | | | | | TableGen has a fairly dubious heuristic to decide whether an alias should be printed: does the alias have lest operands than the real instruction. This is bad enough (particularly with no way to override it), but it should at least be calculated consistently for both strings. This patch implements that logic: first get the *correct* string for the variant, in the same way as the Matcher, without guessing; then count the number of whitespace chars. There are basically 4 changes this brings about after the previous commits; all of these appear to be good, so I have changed the tests: + ARM64: we print "neg X, Y" instead of "sub X, xzr, Y". + ARM64: we skip implicit "uxtx" and "uxtw" modifiers. + Sparc: we print "mov A, B" instead of "or %g0, A, B". + Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B" llvm-svn: 208969
* TableGen: use correct MIOperand when printing aliasesTim Northover2014-05-151-9/+17
| | | | | | | | | | | | | | Previously, TableGen assumed that every aliased operand consumed precisely 1 MachineInstr slot (this was reasonable because until a couple of days ago, nothing more complicated was eligible for printing). This allows a couple more ARM64 aliases to print so we can remove the special code. On the X86 side, I've gone for explicit AT&T size specifiers as the default, so turned off a few of the aliases that would have just started printing. llvm-svn: 208880
* TableGen/ARM64: print aliases even if they have syntax variants.Tim Northover2014-05-151-31/+45
| | | | | | | To get at least one use of the change (and some actual tests) in with its commit, I've enabled the AArch64 & ARM64 NEON mov aliases. llvm-svn: 208867
* Fix typosAlp Toker2014-05-151-1/+1
| | | | llvm-svn: 208839
* Teach the table generator to not generate switch statements containing only ↵Aaron Ballman2014-05-131-12/+15
| | | | | | | | a default label with no cases. This solves some warnings with MSVC. No functional changes intended. llvm-svn: 208694
* TableGen: strengthen assertTim Northover2014-05-131-1/+1
| | | | llvm-svn: 208679
* Fix gcc -Wparentheses warning.Jay Foad2014-05-131-1/+2
| | | | llvm-svn: 208675
* TableGen: use PrintMethods to print more aliasesTim Northover2014-05-121-18/+79
| | | | llvm-svn: 208607
* raw_ostream: Forward declare OpenFlags and include FileSystem.h only where ↵Benjamin Kramer2014-04-291-0/+1
| | | | | | necessary. llvm-svn: 207593
* [Modules] Make Support/Debug.h modular. This requires it to not changeChandler Carruth2014-04-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | behavior based on other files defining DEBUG_TYPE, which means it cannot define DEBUG_TYPE at all. This is actually better IMO as it forces folks to define relevant DEBUG_TYPEs for their files. However, it requires all files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't already. I've updated all such files in LLVM and will do the same for other upstream projects. This still leaves one important change in how LLVM uses the DEBUG_TYPE macro going forward: we need to only define the macro *after* header files have been #include-ed. Previously, this wasn't possible because Debug.h required the macro to be pre-defined. This commit removes that. By defining DEBUG_TYPE after the includes two things are fixed: - Header files that need to provide a DEBUG_TYPE for some inline code can do so by defining the macro before their inline code and undef-ing it afterward so the macro does not escape. - We no longer have rampant ODR violations due to including headers with different DEBUG_TYPE definitions. This may be mostly an academic violation today, but with modules these types of violations are easy to check for and potentially very relevant. Where necessary to suppor headers with DEBUG_TYPE, I have moved the definitions below the includes in this commit. I plan to move the rest of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big enough. The comments in Debug.h, which were hilariously out of date already, have been updated to reflect the recommended practice going forward. llvm-svn: 206822
* remove some dead codeNuno Lopes2014-04-171-13/+0
| | | | | | | | | | | | | | | lib/Analysis/IPA/InlineCost.cpp | 18 ------------------ lib/Analysis/RegionPass.cpp | 1 - lib/Analysis/TypeBasedAliasAnalysis.cpp | 1 - lib/Transforms/Scalar/LoopUnswitch.cpp | 21 --------------------- lib/Transforms/Utils/LCSSA.cpp | 2 -- lib/Transforms/Utils/LoopSimplify.cpp | 6 ------ utils/TableGen/AsmWriterEmitter.cpp | 13 ------------- utils/TableGen/DFAPacketizerEmitter.cpp | 7 ------- utils/TableGen/IntrinsicEmitter.cpp | 2 -- 9 files changed, 71 deletions(-) llvm-svn: 206506
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-151-4/+4
| | | | | | instead of comparing to nullptr. llvm-svn: 206254
* tblgen: Twinify PrintFatalError.Benjamin Kramer2014-03-291-2/+2
| | | | | | No functionality change. llvm-svn: 205110
* TableGen: don't save a StringRef to a local std::string.Tim Northover2014-03-291-2/+2
| | | | | | This caused a failure in some Windows builds. llvm-svn: 205109
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label. The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping. The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function. I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better. The net result is that we don't create temporary labels that are never used. llvm-svn: 203204
* Get rid of a vector copy by just making a pointer out of the reference ↵Craig Topper2014-02-051-15/+15
| | | | | | returned by getInstructionsByEnumValue instead of assigning it to a new vector. llvm-svn: 200828
* Constant propagate MachineInstrClassName.Roman Divacky2014-01-101-3/+1
| | | | llvm-svn: 198969
* All backends use MC now.Rafael Espindola2014-01-101-5/+1
| | | | llvm-svn: 198959
* Remove dead code.Rafael Espindola2013-12-021-1/+0
| | | | llvm-svn: 196066
* TableGen: Refactor AsmWriterEmitter to keep AsmWriterInsts.Ahmed Bougacha2013-10-281-26/+26
| | | | | | | | These used to be referenced by the CGI->AWI map (in AsmWriterEmitter), but stored in a vector local to EmitPrintInstruction. Move the vector to AsmWriterEmitter too. llvm-svn: 193525
* Remove several unused variables.Rafael Espindola2013-10-011-1/+0
| | | | | | Patch by Alp Toker. llvm-svn: 191757
* llvm-tblgen: Mangle operand replacements into the strings in printAliasInstr.Benjamin Kramer2013-09-111-40/+45
| | | | | | Cuts down the bloat in the AArch64 asm writer a bit. llvm-svn: 190527
* This patch that sets the EmitAlias flag in td files Jack Carter2013-02-051-1/+4
| | | | | | | | | | | | | and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic llvm-svn: 174358
* Check whether MCInst operand isImm before calling getImm.Tim Northover2013-01-091-4/+10
| | | | | | | | | When processing possible aliases, TableGen assumes that if an operand *can* be an immediate, then it always *will* be. This is incorrect for the AArch64 backend. This patch inserts a check in the generated code to make sure isImm is true first. llvm-svn: 171972
* Remove exception handling usage from tblgen.Joerg Sonnenberger2012-10-251-3/+3
| | | | | | | | | | | Most places can use PrintFatalError as the unwinding mechanism was not used for anything other than printing the error. The single exception was CodeGenDAGPatterns.cpp, where intermediate errors during type resolution were ignored to simplify incremental platform development. This use is replaced by an error flag in TreePattern and bailout earlier in various places if it is set. llvm-svn: 166712
* tblgen: Use semantically correct RTTI functions.Sean Silva2012-10-101-1/+1
| | | | | | Also, some minor cleanup. llvm-svn: 165647
* tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.Sean Silva2012-10-101-1/+1
| | | | | | | | | | Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>. That will happen in a future patch. There are also two dyn_cast_or_null<>'s slipped in instead of dyn_cast<>'s, since they were causing crashes with just dyn_cast<>. llvm-svn: 165646
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