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path: root/llvm/utils/TableGen/AsmWriterEmitter.cpp
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* [TableGen] Use StringRef instead of std::string for CodeGenInstruction ↵Craig Topper2017-07-071-2/+2
| | | | | | namespace. NFC llvm-svn: 307362
* [TableGen] Adapt more places to getValueAsString now returning a StringRef ↵Craig Topper2017-05-311-20/+24
| | | | | | instead of a std::string. llvm-svn: 304347
* [TableGen] Make Record::getValueAsString and getValueAsListOfStrings return ↵Craig Topper2017-05-311-1/+1
| | | | | | | | | | | | StringRefs instead of std::string Internally both these methods just return the result of getValue on either a StringInit or a CodeInit object. In both cases this returns a StringRef pointing to a string allocated in the BumpPtrAllocator so its not going anywhere. So we can just pass that StringRef along. This is a fairly naive patch that targets just the build failures caused by this change. There's additional work that can be done to avoid creating std::string at call sites that still think getValueAsString returns a std::string. I'll try to clean those up in future patches. Differential Revision: https://reviews.llvm.org/D33710 llvm-svn: 304325
* Add a wrapper around copy_if in STLExtras; NFCSanjoy Das2017-02-211-4/+3
| | | | | | I will add one more use for this in a later change. llvm-svn: 295685
* [TableGen][AsmWriterEmitter] Use a deterministic order to sort InstrAliasesQuentin Colombet2017-02-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Inside an alias group, when ordering instruction aliases, we rely on the priority field to sort them. When the priority is not set or more generally when there is a tie between two aliases, we used to rely on the lexicographic order. However, this order can change for the anonymous records when more instruction, intrinsic, etc. are inserted. For instance, given two anonymous records r1 and r2 with respective name A_999 and A_1000, their lexicography order will be r2 then r1. Now, if an instruction is added before them, their name will become respectively A_1000 and A_1001, thus the lexicography order will be r1 then r2, i.e., it changed. If that happens in an alias group, the assembly output would prefer a different alias for no apparent good reasons. A way to fix that is to use proper priority for all aliases, but we can also make the tie breaker comparison smarter and use a deterministic ordering. This is what this patch does. llvm-svn: 294695
* Revert r294437 as it broke an asan buildbot.Amara Emerson2017-02-081-7/+2
| | | | llvm-svn: 294523
* [AArch64][TableGen] Skip tied result operands for InstAliasAmara Emerson2017-02-081-2/+7
| | | | | | | | | | | | | | | | | | | | | | | This patch checks the number of operands in the resulting instruction instead of just the alias, then skips over tied operands when generating the printing method. This allows us to generate the preferred assembly syntax for the AArch64 'ins' instruction, which should always be displayed as 'mov' according to the ARMARM. Several unit tests have changed as a result, but only to reflect the preferred disassembly. Some other InstAlias patterns (movk/bic/orr) needed a slight adjustment to stop them becoming the default and breaking other unit tests. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D29219 llvm-svn: 294437
* Mark comparator call operator as constEric Fiselier2016-12-271-1/+1
| | | | llvm-svn: 290636
* TableGen: Use StringRef instead of const std::string& in return vals.Matthias Braun2016-12-041-9/+9
| | | | | | | This will allow to switch to a different string storage in an upcoming commit. llvm-svn: 288612
* Fix some Clang-tidy and Include What You Use warnings; other minor fixes (NFC).Eugene Zelenko2016-11-301-18/+37
| | | | | | This preparation to remove SetVector.h dependency on SmallSet.h. llvm-svn: 288256
* TableGen: Allow signed immediates for instruction aliasesJacob Baungard Hansen2016-11-241-1/+1
| | | | | | | | | | | | Patch by Daniel Cederman. Reviewers: stoklund, arsenm Subscribers: arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D27046 llvm-svn: 287856
* [tablegen] Merge duplicate definitions of getMinimalTypeForRange. NFC.Daniel Sanders2016-11-191-10/+2
| | | | | | | | | | | | Summary: Depends on D25614 Reviewers: qcolombet Subscribers: qcolombet, beanz, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D25617 llvm-svn: 287438
* Use the range variant of remove_if instead of unpacking begin/endDavid Majnemer2016-08-121-4/+2
| | | | | | No functionality change is intended. llvm-svn: 278475
* Use the range variant of find/find_if instead of unpacking begin/endDavid Majnemer2016-08-121-5/+3
| | | | | | | | | If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278469
* TableGen: promote "code" type from syntactic sugar.Tim Northover2016-07-051-1/+1
| | | | | | | It's being immediately converted to a "string", but being able to tell what type the field was originally can be useful in backends. llvm-svn: 274575
* Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.Benjamin Kramer2016-06-121-1/+1
| | | | | | No functionality change intended. llvm-svn: 272516
* AsmWriterEmitter.cpp assumes that all operands of a printed aliasSjoerd Meijer2016-06-031-3/+4
| | | | | | | | | | | will appear after a blank. This assumption does not hold in the ARM target. Patch by: Roger Ferrer Ibanez Differential Revision: http://reviews.llvm.org/D20234 llvm-svn: 271666
* Currently AsmWriterEmiter.cpp (used by tblgen -gen-asm-writer) does notSjoerd Meijer2016-06-031-2/+34
| | | | | | | | | | | | | consider the Predicates attached to InstAlias when generating printAliasInstr. This forces users of printAliasInstr to check those predicates beforehand. This commit adds them in the condition set of the IAPrinter object. Patch by: Roger Ferrer Ibanez Differential Revision: http://reviews.llvm.org/D20233 llvm-svn: 271665
* Apply clang-tidy's misc-move-constructor-init throughout LLVM.Benjamin Kramer2016-05-271-1/+3
| | | | | | No functionality change intended, maybe a tiny performance improvement. llvm-svn: 270997
* Fix commentXinliang David Li2016-02-231-1/+1
| | | | llvm-svn: 261672
* [TableGen] In AsmWriterEmitter unique command search, rather than storing a ↵Craig Topper2016-01-241-43/+32
| | | | | | | | mapping from instruction to unique command, instead store a list of which instructions each unique command corresponds to. This simplifies the complexity of the code that tries to find further operands to merge into the unique command. llvm-svn: 258656
* [TableGen] Make a class member local to the function that populates it and ↵Craig Topper2016-01-221-1/+2
| | | | | | consumes it later. NFC llvm-svn: 258490
* [TableGen] Keep a returned const reference instead of making a copy. NFCCraig Topper2016-01-171-1/+1
| | | | llvm-svn: 258020
* [TableGen] Return ArrayRef instead of a std::vector reference from ↵Craig Topper2016-01-171-7/+7
| | | | | | getInstructionsByEnumValue(). NFC llvm-svn: 258018
* [TableGen] Changes to AsmWriterEmitter to remove the CodeGenInstruction to ↵Craig Topper2016-01-171-67/+43
| | | | | | | | AsmWriterInst map. NFC Adds the corresponding CodeGenInstruction number to each AsmWriterInst. Then write all the operand uniqueing loops using the AsmWriterInst array and indices. Then use the CodeGenInstruction index to fill out the OpCodeInfo array. llvm-svn: 258005
* [TableGen] Use std::find instead of a manual loop. NFCCraig Topper2016-01-171-10/+8
| | | | llvm-svn: 258004
* [TableGen] Pass PassSubtarget flag into getCode instead of storing a copy of ↵Craig Topper2016-01-141-15/+18
| | | | | | the flag in every AsmWriterOperand. NFC llvm-svn: 257743
* [TableGen] Cleanup output formatting and add llvm_unreachables to the output ↵Craig Topper2016-01-131-5/+6
| | | | | | the AsmMatcher uses when it overflows the 64-bit tables. No in tree targets use this code, but I tested it with an temporarily reduced table width. llvm-svn: 257583
* [TableGen] Replace some hardcoded assumptions that the OpcodeInfo table is ↵Craig Topper2016-01-131-8/+10
| | | | | | 64-bits for cleanliness. NFC llvm-svn: 257582
* [TableGen] Use std::remove_if instead of an n^2 loop. NFCCraig Topper2016-01-131-8/+5
| | | | llvm-svn: 257581
* [TableGen] Fix up some stale comments in the AsmMatcher. NFCCraig Topper2016-01-131-4/+2
| | | | llvm-svn: 257580
* [TableGen] Move calls to getValueAsInt out of a loop since they aren't ↵Craig Topper2016-01-131-2/+3
| | | | | | simple functions. NFC llvm-svn: 257579
* [TableGen] Allow asm writer to use up to 3 OpInfo tables instead of 2. This ↵Craig Topper2016-01-111-30/+32
| | | | | | | | allows x86 to use 56 total bits made up of a 32-bit, 16-bit, and 8-bit table. Previously we were using 64 total bits. This saves 14K from the x86 table size. And saves space on other targets as well. llvm-svn: 257315
* [TableGen] Remove unnecessary 0 terminator from an array that only existed ↵Craig Topper2016-01-111-4/+0
| | | | | | to prevent ending an array with a comma. But that's perfectly legal and not something we need to prevent. NFC llvm-svn: 257314
* [TableGen] Use range-based for loops. Also fix one loop to not use some ↵Craig Topper2016-01-081-25/+20
| | | | | | index name as an outer loop. NFC llvm-svn: 257156
* [TableGen] Combine variable declaration and initialization. Move a string ↵Craig Topper2016-01-081-3/+2
| | | | | | into a vector instead of copying. NFC llvm-svn: 257155
* [TableGen] Correct Namespace lookup with AltNames in AsmWriterEmitterHal Finkel2015-12-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | AsmWriterEmitter will generate a getRegisterName function with an alternate register name index as its second argument if the target makes use of them. The enum of these values is generated in RegisterInfoEmitter. The getRegisterName generator would assume the namespace could always be found by reading index 1 of the list of AltNameIndices, but this will fail if this list is sorted such that the NoRegAltName is at index 1. Because this list is sorted by record name (in CodeGenTarget::ReadRegAltNameIndices), you only run in to problems if your MyTargetRegisterInfo.td defines a single RegAltNameIndex that sorts lexically before NoRegAltName. For example, if a target has something like def AnAltNameIndex : RegAltNameIndex and defines RegAltNameIndices for some registers then, prior to this change, AsmWriterEmitter would generate references to ::AnAltNameIndex and ::NoRegAltName Patch by Alex Bradbury! llvm-svn: 255344
* [AArch64] Add ARMv8.2-A Statistical Profiling ExtensionOliver Stannard2015-12-011-5/+7
| | | | | | | | | | | | The Statistical Profiling Extension is an optional extension to ARMv8.2-A. Since it is an optional extension, I have added the FeatureSPE subtarget feature to control it. The assembler-visible parts of this extension are the new "psb csync" instruction, which is equivalent to "hint #17", and a number of system registers. Differential Revision: http://reviews.llvm.org/D15021 llvm-svn: 254401
* Remove and forbid raw_svector_ostream::flush() calls.Yaron Keren2015-08-131-1/+0
| | | | | | | | | | After r244870 flush() will only compare two null pointers and return, doing nothing but wasting run time. The call is not required any more as the stream and its SmallString are always in sync. Thanks to David Blaikie for reviewing. llvm-svn: 244928
* Fix memory leaks by avoiding extra manual dynamic allocationDavid Blaikie2015-08-061-57/+41
| | | | | | Improvement to r244212. llvm-svn: 244252
* Plug memory leaks in AsmWriterEmitter::EmitPrintAliasInstruction.Yaron Keren2015-08-061-0/+8
| | | | llvm-svn: 244212
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-291-3/+2
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* [MCInstPrinter] Enable MCInstPrinter to change its behavior based on theAkira Hatanaka2015-03-271-7/+20
| | | | | | | | | | | | | | | | | | | | per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. llvm-svn: 233411
* Teach raw_ostream to accept SmallString.Yaron Keren2015-03-101-1/+1
| | | | | | | | | | | | | | Saves adding .str() call to any raw_ostream << SmallString usage and a small step towards making .str() consistent in the ADTs by removing one of the SmallString::str() use cases, discussion at http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20141013/240026.html I'll update the Phabricator patch http://reviews.llvm.org/D6372 for review of the Twine SmallString support, it's more complex than this one. llvm-svn: 231763
* Replace size method call of containers to empty method where appropriateAlexander Kornienko2015-01-151-2/+2
| | | | | | | | | | | | | | | | This patch was generated by a clang tidy checker that is being open sourced. The documentation of that checker is the following: /// The emptiness of a container should be checked using the empty method /// instead of the size method. It is not guaranteed that size is a /// constant-time function, and it is generally more efficient and also shows /// clearer intent to use empty. Furthermore some containers may implement the /// empty method but not implement the size method. Using empty whenever /// possible makes it easier to switch to another container in the future. Patch by Gábor Horváth! llvm-svn: 226161
* On behalf of Matthew Wahab:Evgeny Astigeevich2014-12-161-1/+7
| | | | | | | | | | | | | | | | An instruction alias defined with InstAlias and an optional operand in the middle of the AsmString field, "..${a} <operands>", would get the final "}" printed in the instruction disassembly. This wouldn't happen if the optional operand appeared as the last item in the AsmString which is how the current backends avoided the problem. There don't appear to be any tests for this part of Tablegen but it passes the pre-commit tests. Manually tested the change by enabling the generic alias printer in the ARM backend and checking the output. Differential Revision: http://reviews.llvm.org/D6529 llvm-svn: 224348
* Remove indirection of vector<T*> in favor of deque<T>David Blaikie2014-11-291-6/+5
| | | | llvm-svn: 222958
* Use range-based for loops.Craig Topper2014-11-251-5/+3
| | | | llvm-svn: 222782
* Remove dead code.Craig Topper2014-11-251-2/+1
| | | | llvm-svn: 222781
* Remove unused MaxSize variable.Craig Topper2014-11-251-7/+0
| | | | llvm-svn: 222780
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