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path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
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* Give CodeGenRegisterClass a real sorted member set.Jakob Stoklund Olesen2011-06-151-4/+4
| | | | | | | | | | | Make the Elements vector private and expose an ArrayRef through getOrder() instead. getOrder will eventually provide multiple user-specified allocation orders. Use the sorted member set for member and subclass tests. Clean up a lot of ad hoc searches. llvm-svn: 133040
* Tidy up. Add missing newline to generated file.Jim Grosbach2011-05-031-1/+1
| | | | llvm-svn: 130779
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-4/+4
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* tlbgen/MC: StringRef's to temporary objects considered harmful.Daniel Dunbar2011-04-011-3/+3
| | | | llvm-svn: 128735
* Check that MnemonicAlias doesn't map back to the same string.Joerg Sonnenberger2011-02-171-0/+2
| | | | llvm-svn: 125792
* AsmMatcher custom operand parser failure enhancements.Jim Grosbach2011-02-121-17/+19
| | | | | | | | | | | Teach the AsmMatcher handling to distinguish between an error custom-parsing an operand and a failure to match. The former should propogate the error upwards, while the latter should continue attempting to parse with alternative matchers. Update the ARM asm parser accordingly. llvm-svn: 125426
* Tidy out asm matcher .inc output.Jim Grosbach2011-02-111-2/+2
| | | | llvm-svn: 125408
* Don't return before calling the post-processing function(s).Bill Wendling2011-02-101-1/+0
| | | | llvm-svn: 125256
* Do AsmMatcher operand classification per-opcode.Jim Grosbach2011-02-101-88/+29
| | | | | | | | | | When matching operands for a candidate opcode match in the auto-generated AsmMatcher, check each operand against the expected operand match class. Previously, operands were classified independently of the opcode being handled, which led to difficulties when operand match classes were more complicated than simple subclass relationships. llvm-svn: 125245
* Implement support for custom target specific asm parsing of operands.Bruno Cardoso Lopes2011-02-071-3/+262
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Motivation: Improve the parsing of not usual (different from registers or immediates) operand forms. This commit implements only the generic support. The ARM specific modifications will come next. A table like the one below is autogenerated for every instruction containing a 'ParserMethod' in its AsmOperandClass static const OperandMatchEntry OperandMatchTable[20] = { /* Mnemonic, Operand List Mask, Operand Class, Features */ { "cdp", 29 /* 0, 2, 3, 4 */, MCK_Coproc, Feature_IsThumb|Feature_HasV6 }, { "cdp", 58 /* 1, 3, 4, 5 */, MCK_Coproc, Feature_IsARM }, A matcher function very similar (but lot more naive) to MatchInstructionImpl scans the table. After the mnemonic match, the features are checked and if the "to be parsed" operand index is present in the mask, there's a real match. Then, a switch like the one below dispatch the parsing to the custom method provided in 'ParseMethod': case MCK_Coproc: return TryParseCoprocessorOperandName(Operands); llvm-svn: 125030
* MC/AsmMatcher: Sink ConvertToMCInst into the TargetAsmParser instance, whichDaniel Dunbar2011-02-041-3/+8
| | | | | | implicitly allows custom conversions to be member functions. llvm-svn: 124908
* MC/AsmParser: Add support for allowing the conversion process to fail (viaDaniel Dunbar2011-02-041-8/+17
| | | | | | custom conversion functions). llvm-svn: 124872
* MC/AsmMatcher: Add support for custom conversion functions.Daniel Dunbar2011-02-041-1/+20
| | | | llvm-svn: 124870
* Changed the TableGen created MatchInstructionImpl() setting of ErrorInfo.Kevin Enderby2011-02-021-3/+1
| | | | | | | | | | | The algorithm for identifying which operand is invalid will now always point to some operand and not the mnemonic sometimes. The change is now that ErrorInfo is the index of the highest operand that does not match for any of the matching mnemonics records. And no longer the ~0U value when the mnemonic matches and not every record with a matching mnemonic has the same mismatching operand index. llvm-svn: 124734
* Add a MnemonicIsValid method to the asm matcher.Bob Wilson2011-01-261-0/+11
| | | | | | Patch by Bill Wendling. llvm-svn: 124328
* Fix spelling of CouldMatchAmbiguouslyWith method name.Bob Wilson2011-01-261-4/+4
| | | | llvm-svn: 124324
* Whitespace and 80-column fixes.Bob Wilson2011-01-261-119/+109
| | | | llvm-svn: 124323
* Improve the AsmMatcher's ability to handle suboperands.Bob Wilson2011-01-261-84/+138
| | | | | | | | | | | | | | | When an operand class is defined with MIOperandInfo set to a list of suboperands, the AsmMatcher has so far required that operand to also define a custom ParserMatchClass, and InstAlias patterns have not been able to set the individual suboperands separately. This patch removes both of those restrictions. If a "compound" operand does not override the default ParserMatchClass, then the AsmMatcher will now parse its suboperands separately. If an InstAlias operand has the same class as the corresponding compound operand, then it will be handled as before; but if that check fails, TableGen will now try to match up a sequence of InstAlias operands with the corresponding suboperands. llvm-svn: 124314
* tblgen/AsmMatcherEmitter: Fix alias handling to honor -match-prefix.Daniel Dunbar2011-01-241-0/+11
| | | | llvm-svn: 124154
* ARM uses '.' in their tokens. Give it a name instead of a numeric value.Bill Wendling2011-01-221-0/+1
| | | | llvm-svn: 124026
* Tidy comment.Bob Wilson2011-01-201-2/+2
| | | | llvm-svn: 123933
* Precompute InstAlias operand mapping to result instruction operand indices.Bob Wilson2011-01-201-1/+1
| | | | | | | There should be no functional change from this, but I think it's simpler this way. llvm-svn: 123931
* When matching asm operands, always try to match the most restricted type first.Owen Anderson2011-01-181-3/+36
| | | | | | | | | | | | Unfortunately, while this is the "right" thing to do, it breaks some ARM asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous. This is tricky to resolve since neither is a subset of the other. XFAIL the test for now. The old way was broken in other ways, just ways we didn't happen to be testing, and our ARM asm parsing is going to require significant revisiting at a later point anyways. llvm-svn: 123786
* Formatting tweak.Daniel Dunbar2011-01-181-1/+1
| | | | llvm-svn: 123718
* Fix some tablegen issues to allow using zero_reg for InstAlias definitions.Bob Wilson2011-01-141-3/+8
| | | | | | | | This is needed to allow an InstAlias for an instruction with an "OptionalDef" result register (like ARM's cc_out) where you want to set the optional register to reg0. llvm-svn: 123490
* MC/AsmMatcher: Fix indirect 80-col viola.Daniel Dunbar2011-01-101-6/+3
| | | | llvm-svn: 123174
* various cleanups to tblgen, patch by Garrison Venn!Chris Lattner2010-12-151-9/+5
| | | | llvm-svn: 121837
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-131-6/+21
| | | | llvm-svn: 121659
* Give the exclamation point a name instead of a number.Bill Wendling2010-11-181-0/+1
| | | | llvm-svn: 119759
* pass literals like $$1 through to the asm matcher. This isn't right yet, ↵Chris Lattner2010-11-061-9/+10
| | | | | | but doesn't hurt. llvm-svn: 118359
* add (and document) the ability for alias results to haveChris Lattner2010-11-061-6/+36
| | | | | | | | fixed physical registers. Start moving fp comparison aliases to the .td file (which default to using %st1 if nothing is specified). llvm-svn: 118352
* generalize alias support to allow the result of an alias toChris Lattner2010-11-061-20/+39
| | | | | | | add fixed immediate values. Move the aad and aam aliases to use this, and document it. llvm-svn: 118350
* fix a bug where we had an implicit assumption that theChris Lattner2010-11-061-2/+3
| | | | | | | | result instruction operand numbering matched the result pattern. Fixing this allows us to move the xchg/test aliases to the .td file. llvm-svn: 118334
* fix some bugs in the alias support, unblocking changing of "clr" aliasesChris Lattner2010-11-061-3/+37
| | | | | | from c++ hacks to proper .td InstAlias definitions. Change them! llvm-svn: 118330
* Reimplement BuildResultOperands to be in terms of the result instruction'sChris Lattner2010-11-061-19/+19
| | | | | | | | | | | | | | | | | | operand list instead of the operand list redundantly declared on the alias or instruction. With this change, we finally remove the ins/outs list on the alias. Before: def : InstAlias<(outs GR16:$dst), (ins GR8 :$src), "movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; After: def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; This also makes the alias mechanism more general and powerful, which will be exploited in subsequent patches. llvm-svn: 118329
* implement more checking to reject things like:Chris Lattner2010-11-061-34/+11
| | | | | | | | | | (someinst GR16:$foo, GR32:$foo) Reimplement BuildAliasOperandReference to be correctly based on the names of operands in the result pattern, instead of on the instruction operand definitions. llvm-svn: 118328
* simplifyChris Lattner2010-11-061-6/+8
| | | | llvm-svn: 118326
* fix another fixme, replacing a string with a semantic pointer.Chris Lattner2010-11-061-10/+9
| | | | llvm-svn: 118325
* disolve a hack, having CodeGenInstAlias decode the alias in the .tdChris Lattner2010-11-061-11/+5
| | | | | | file instead of the asmmatcher. llvm-svn: 118324
* partition operand processing between aliases and instructions.Chris Lattner2010-11-041-8/+65
| | | | | | | | Right now the code is partitioned but the behavior is the same. This should be improved in the near future. This removes some uses of TheOperandList. llvm-svn: 118232
* pull name slicing out of BuildInstructionOperandReference soChris Lattner2010-11-041-16/+12
| | | | | | it doesn't do any lexical stuff anymore. llvm-svn: 118230
* cleanups.Chris Lattner2010-11-041-18/+22
| | | | llvm-svn: 118228
* replace SrcOpNum with SrcOpName, eliminating a numering dependencyChris Lattner2010-11-041-26/+23
| | | | | | on the incoming operand list. This also makes the code simpler. llvm-svn: 118225
* strength reduce some code, resolving a fixme.Chris Lattner2010-11-041-66/+59
| | | | llvm-svn: 118219
* take a big step to making aliases more general and less of a hack:Chris Lattner2010-11-041-112/+197
| | | | | | | | now matchables contain an explicit list of how to populate each operand in the result instruction instead of having them somehow magically be correlated to the input inst. llvm-svn: 118217
* rename Operand -> AsmOperand for clarity.Chris Lattner2010-11-031-23/+17
| | | | llvm-svn: 118190
* Completely reject instructions that have an operand in theirChris Lattner2010-11-021-18/+12
| | | | | | | | | | | | ins/outs list that isn't specified by their asmstring. Previously the asmmatcher would just force a 0 register into it, which clearly isn't right. Mark a bunch of ARM instructions that use this as isCodeGenOnly. Some of them are clearly pseudo instructions (like t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will either need to be removed or the asmmatcher will need to be taught about it (someday). llvm-svn: 118119
* make MatchableInfo::Validate reject instructions (like LDR_PRE in ARM)Chris Lattner2010-11-021-6/+31
| | | | | | that have complicated tying going on. llvm-svn: 118112
* rewrite EmitConvertToMCInst to iterate over the MCInst operands,Chris Lattner2010-11-021-98/+64
| | | | | | | | filling them in one at a time. Previously this iterated over the asmoperands, which left the problem of "holes". The new approach simplifies things. llvm-svn: 118104
* merge two large parallel loops in EmitConvertToMCInst, no changeChris Lattner2010-11-021-64/+40
| | | | | | in the generated .inc files. llvm-svn: 118083
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