summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
diff options
context:
space:
mode:
authorBob Wilson <bob.wilson@apple.com>2011-01-14 22:58:09 +0000
committerBob Wilson <bob.wilson@apple.com>2011-01-14 22:58:09 +0000
commit03912aba9a40fc33268a8369103da2b2e33556f7 (patch)
tree5578693232b7c9b56d83fadd822c5cf18a577d86 /llvm/utils/TableGen/AsmMatcherEmitter.cpp
parent715e461463c918c13eb48cb347210322ad4b8aec (diff)
downloadbcm5719-llvm-03912aba9a40fc33268a8369103da2b2e33556f7.tar.gz
bcm5719-llvm-03912aba9a40fc33268a8369103da2b2e33556f7.zip
Fix some tablegen issues to allow using zero_reg for InstAlias definitions.
This is needed to allow an InstAlias for an instruction with an "OptionalDef" result register (like ARM's cc_out) where you want to set the optional register to reg0. llvm-svn: 123490
Diffstat (limited to 'llvm/utils/TableGen/AsmMatcherEmitter.cpp')
-rw-r--r--llvm/utils/TableGen/AsmMatcherEmitter.cpp11
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 511538db9d7..6262cf8cc16 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1380,9 +1380,14 @@ static void EmitConvertToMCInst(CodeGenTarget &Target,
break;
}
case MatchableInfo::ResOperand::RegOperand: {
- std::string N = getQualifiedName(OpInfo.Register);
- CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
- Signature += "__reg" + OpInfo.Register->getName();
+ if (OpInfo.Register == 0) {
+ CaseOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
+ Signature += "__reg0";
+ } else {
+ std::string N = getQualifiedName(OpInfo.Register);
+ CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
+ Signature += "__reg" + OpInfo.Register->getName();
+ }
}
}
}
OpenPOWER on IntegriCloud