| Commit message (Collapse) | Author | Age | Files | Lines |
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A temporary flag -arm-tail-calls defaults to off,
so there is no functional change by default.
Intrepid users may try this; simple cases work
but there are bugs.
llvm-svn: 105413
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t2ADDrSPi12/t2SUBrSPi12,
as their generic counterparts t2ADDri12/t2SUBri12 should suffice.
llvm-svn: 101929
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We are bound to fail! For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.
This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.
llvm-svn: 100899
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such that the non-VFP versions have no implicit defs of VFP registers.
If any callee-saved VFP registers are marked as having been defined, the
prologue/epilogue code will try to save and restore them.
Radar 7770432.
llvm-svn: 100892
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encounters decoding conflicts, instead of wrapping it inside the DEBUG() macro.
llvm-svn: 100886
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to avoid memcpy() call is no longer necessary.
llvm-svn: 100811
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passed to free.
llvm-svn: 100767
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llvm-svn: 100691
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ARMDecoderEmitter.cpp, with FIXME comment.
llvm-svn: 100690
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llvm-svn: 100268
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is expected.
llvm-svn: 100247
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llvm-svn: 100244
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(Fix build failure)
llvm-svn: 100243
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backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.
Reviewed by Chris Latter and Bob Wilson.
llvm-svn: 100233
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