Commit message (Collapse) | Author | Age | Files | Lines | |
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* | reland r332579: [llvm-exegesis] Update to cover latency through another opcode. | Clement Courbet | 2018-05-17 | 1 | -79/+0 |
| | | | | | | | | | | | | | | Restructuring the code to measure latency and uops. The end goal is to have this program spawn another process to deal with SIGILL and other malformed programs. It is not yet the case in this redesign, it is still the main program that runs the code (and may crash). It now uses BitVector instead of Graph for performance reasons. https://reviews.llvm.org/D46821 (with fixed ARM tests) Authored by Guillaume Chatelet llvm-svn: 332592 | ||||
* | [llvm-exegesis] InMemoryAssembler: handle return-less targets (e.g. arm). | Clement Courbet | 2018-05-15 | 1 | -0/+79 |
Summary: Arm does not have a ret code per se. Reviewers: gchatelet Subscribers: mgorny, javed.absar, kristof.beyls, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D45672 llvm-svn: 332331 |