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* [llvm-exegesis][NFC] internal changesGuillaume Chatelet2019-12-181-15/+15
| | | | | | | | | | | | | | Summary: BitVectors are now cached to lower memory utilization. Instructions have reference semantics. Reviewers: courbet Subscribers: sdardis, tschuett, jrtc27, atanasyan, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D71653
* [llvm-exegesis] Fix 44b9942898c7.Clement Courbet2019-12-021-0/+1
| | | | | | | | | | | | | | Summary: Add missing stack release instructions in loadImplicitRegAndFinalize. Reviewers: pengfei, gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70903
* [X86] Add initialization of FPCW in llvm-exegesisWang, Pengfei2019-12-021-5/+11
| | | | | | | | | | | | Summary: This is a following up to D70874. It adds the initialization of FPCW in llvm-exegesis. Reviewers: craig.topper, RKSimon, courbet, gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70891
* [X86] Add initialization of MXCSR in llvm-exegesisWang, Pengfei2019-12-021-0/+17
| | | | | | | | | | | | Summary: This patch is used to initialize the new added register MXCSR. Reviewers: craig.topper, RKSimon Subscribers: tschuett, courbet, llvm-commits, LiuChen3 Tags: #llvm Differential Revision: https://reviews.llvm.org/D70874
* [llvm-exegesis][NFC] Remove extra `llvm::` qualifications.Clement Courbet2019-10-091-156/+147
| | | | | | | | | | | | | | Summary: Second patch: in the lib. Reviewers: gchatelet Subscribers: nemanjai, tschuett, MaskRay, mgrang, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68692 llvm-svn: 374158
* [llvm-exegesis] Add missing std::move in rL374146.Clement Courbet2019-10-091-2/+2
| | | | | | | | | | | | This was breaking some bots: /home/buildbots/ppc64le-clang-lnt-test/clang-ppc64le-lnt/llvm/include/llvm/Support/Error.h:483:5: required from ‘llvm::Expected<T>::Expected(OtherT&&, typename std::enable_if<std::is_convertible<_Rep2, _Rep>::value>::type*) [with OtherT = std::vector<llvm::exegesis::CodeTemplate>&; T = std::vector<llvm::exegesis::CodeTemplate>; typename std::enable_if<std::is_convertible<_Rep2, _Rep>::value>::type = void]’ /home/buildbots/ppc64le-clang-lnt-test/clang-ppc64le-lnt/llvm/tools/llvm-exegesis/lib/X86/Target.cpp:238:20: required from here /usr/include/c++/6/bits/stl_construct.h:75:7: error: use of deleted function ‘llvm::exegesis::CodeTemplate::CodeTemplate(const llvm::exegesis::CodeTemplate&)’ { ::new(static_cast<void*>(__p)) _T1(std::forward<_Args>(__args)...); } ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ llvm-svn: 374149
* [llvm-exegesis][NFC] Fix rL374146.Clement Courbet2019-10-091-1/+1
| | | | | | Remove extra semicolon: Target.cpp:187:2: warning: extra ‘;’ [-Wpedantic] llvm-svn: 374147
* [llvm-exegesis] Explore LEA addressing modes.Clement Courbet2019-10-091-11/+106
| | | | | | | | | | | | | | | | | Summary: This will help for PR32326. This shows the well-known issue with `RBP` and `R13` as base registers. Reviewers: gchatelet Subscribers: tschuett, llvm-commits, RKSimon, andreadb Tags: #llvm Differential Revision: https://reviews.llvm.org/D68646 llvm-svn: 374146
* [llvm-exegesis] Add options to SnippetGenerator.Clement Courbet2019-10-081-6/+8
| | | | | | | | | | | | | | | | Summary: This adds a `-max-configs-per-opcode` option to limit the number of configs per opcode. Reviewers: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68642 llvm-svn: 374054
* [llvm-exegesis][NFC] Rename ExegesisTarget::decrementLoopCounterAndLoop()Clement Courbet2019-10-031-4/+6
| | | | | | | | | | | | | | Summary: To decrementLoopCounterAndJump, and explicitely take the jump target. Reviewers: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68375 llvm-svn: 373571
* [llvm-exegesis][NFC] Move BenchmarkFailure to own file.Clement Courbet2019-09-301-12/+13
| | | | | | | | | | | | | | Summary: And rename to exegesis::Failure, as it's used everytwhere. Reviewers: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68217 llvm-svn: 373209
* [llvm-exegesis] Add loop mode for repeating the snippet.Clement Courbet2019-09-271-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Before this change the Executable function was made by duplicating the snippet. This change adds a --repetion-mode={loop|duplicate} flag that allows choosing between this behaviour and wrapping the snippet instructions in a loop. The new mode can help measurements when the snippet fits in the DSB by short-cirtcuiting decoding. The loop adds a dec + jmp to the measurements, but since these are not part of the critical path, they execute in parallel with the measured code and do not impact measurements in practice. Overview of the change: - New SnippetRepetitor abstraction that handles repeating the snippet. The assembler delegates repeating the instructions to this class. - ExegesisTarget learns how to decrement loop counter and jump. - Some refactoring of the assembler into FunctionFiller/BasicBlockFiller. Reviewers: gchatelet Subscribers: mgorny, tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68125 llvm-svn: 373083
* [llvm-exegesis] Refactor how forbidden registers are computed.Clement Courbet2019-09-271-6/+10
| | | | | | | | | | | | | | | | | | | | Summary: Right now latency generation can incorrectly select the scratch register as a dependency-carrying register. - Move the logic for preventing register selection from Uops implementation to common SnippetGenerator class. - Aliasing detection now takes a set of forbidden registers just like random register assignment does. Reviewers: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68084 llvm-svn: 373048
* [llvm] Migrate llvm::make_unique to std::make_uniqueJonas Devlieghere2019-08-151-2/+2
| | | | | | | | Now that we've moved to C++14, we no longer need the llvm::make_unique implementation from STLExtras.h. This patch is a mechanical replacement of (hopefully) all the llvm::make_unique instances across the monorepo. llvm-svn: 369013
* [llvm-exegesis][X86] Randomize CMOVcc/SETcc OPERAND_COND_CODE CondCodesRoman Lebedev2019-04-081-2/+3
| | | | | | | | | | | | | | Reviewers: courbet, gchatelet Reviewed By: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60066 llvm-svn: 357898
* [llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE OperandTypeRoman Lebedev2019-04-061-0/+21
| | | | | | | | | | | | | | | | | | | | | | Summary: D60041 / D60138 refactoring changed how CMOV/SETcc opcodes are handled. concode is now an immediate, with it's own operand type. This at least allows to not crash on the opcode. However, this still won't generate all the snippets with all the condcode enumerators. D60066 does that. Reviewers: courbet, gchatelet Reviewed By: gchatelet Subscribers: tschuett, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60057 llvm-svn: 357841
* [X86] Merge the different Jcc instructions for each condition code into ↵Craig Topper2019-04-051-0/+1
| | | | | | | | | | | | | | | | | | | | | single instructions that store the condition code as an operand. Summary: This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes. Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser. Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon Reviewed By: RKSimon Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60228 llvm-svn: 357802
* [X86] Merge the different SETcc instructions for each condition code into ↵Craig Topper2019-04-051-0/+2
| | | | | | | | | | | | | | | | | | | | | single instructions that store the condition code as an operand. Summary: This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between SETcc instructions and condition codes. Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser. Reviewers: andreadb, courbet, RKSimon, spatel, lebedev.ri Reviewed By: andreadb Subscribers: hiraditya, lebedev.ri, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60138 llvm-svn: 357801
* [X86] Merge the different CMOV instructions for each condition code into ↵Craig Topper2019-04-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | single instructions that store the condition code as an immediate. Summary: Reorder the condition code enum to match their encodings. Move it to MC layer so it can be used by the scheduler models. This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between CMOV instructions and condition codes. Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser. This does complicate the scheduler models a little since we can't assign the A and BE instructions to a separate class now. I plan to make similar changes for SETcc and Jcc. Reviewers: RKSimon, spatel, lebedev.ri, andreadb, courbet Reviewed By: RKSimon Subscribers: gchatelet, hiraditya, kristina, lebedev.ri, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60041 llvm-svn: 357800
* [llvm-exegesis] Allow the target to disable the selection of some registers.Clement Courbet2019-03-261-0/+13
| | | | | | | | | | | | | | | | | | | | Summary: This prevents "Cannot encode high byte register in REX-prefixed instruction" from happening on instructions that require REX encoding when AH & co get selected. On the down side, these 4 registers can no longer be selected automatically, but this avoids having to expose all the X86 encoding complexity. Reviewers: gchatelet Subscribers: tschuett, jdoerfert, llvm-commits, bdb Tags: #llvm Differential Revision: https://reviews.llvm.org/D59821 llvm-svn: 357003
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-192-8/+6
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [llvm-exegesis][NFC] Some code style cleanupJinsong Ji2018-11-201-201/+238
| | | | | | | | | | | | | Apply review comments of https://reviews.llvm.org/D54185 to other target as well, specifically: 1. make anonymous namespaces as small as possible, avoid using static inside anonymous namespaces 2. Add missing header to some files 3. GetLoadImmediateOpcodem-> getLoadImmediateOpcode 4. Fix typo Differential Revision: https://reviews.llvm.org/D54343 llvm-svn: 347309
* Revert "[llvm-exegesis] Add a snippet generator to generate snippets to ↵Clement Courbet2018-11-081-13/+0
| | | | | | | | compute ROB sizes." This reverts accidental commit rL346394. llvm-svn: 346398
* [llvm-exegesis] Add a snippet generator to generate snippets to compute ROB ↵Clement Courbet2018-11-081-0/+13
| | | | | | sizes. llvm-svn: 346394
* [llvm-exegesis] Remove superfluous move.Clement Courbet2018-11-071-1/+1
| | | | | | | | | | | /Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/tools/llvm-exegesis/lib/X86/Target.cpp:155:12: error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move] return std::move(Error); ^ /Users/buildslave/as-bldslv9_new/lld-x86_64-darwin13/llvm.src/tools/llvm-exegesis/lib/X86/Target.cpp:155:12: note: remove std::move call here return std::move(Error); ^~~~~~~~~~ ~ llvm-svn: 346333
* [llvm-exegesis] Correclty handle all X86 memory encoding formats.Clement Courbet2018-11-071-63/+141
| | | | | | | | | | | | | | Summary: Add unit tests to check the support for each supported format to avoid regressions such as the one in PR36906. Reviewers: gchatelet Subscribers: tschuett, lebedev.ri, llvm-commits Differential Revision: https://reviews.llvm.org/D54144 llvm-svn: 346330
* [llvm-exegesis] Ignore X86 pseudo instructions.Clement Courbet2018-11-061-0/+3
| | | | | | | | | | | | Summary: They do not lower to actual MCInsts and have no scheduling info. Reviewers: gchatelet Subscribers: llvm-commits, tschuett Differential Revision: https://reviews.llvm.org/D54147 llvm-svn: 346227
* [MCSched] Bind PFM Counters to the CPUs instead of the SchedModel.Clement Courbet2018-10-251-0/+6
| | | | | | | | | | | | | | | | Summary: The pfm counters are now in the ExegesisTarget rather than the MCSchedModel (PR39165). This also compresses the pfm counter tables (PR37068). Reviewers: RKSimon, gchatelet Subscribers: mgrang, llvm-commits Differential Revision: https://reviews.llvm.org/D52932 llvm-svn: 345243
* [llvm-exegesis] Move namespace exegesis inside llvm::Fangrui Song2018-10-221-0/+2
| | | | | | | | | | | | | | | | Summary: This allows simplifying references of llvm::foo with foo when the needs come in the future. Reviewers: courbet, gchatelet Reviewed By: gchatelet Subscribers: javed.absar, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53455 llvm-svn: 344922
* [llvm-exegesis] Mark x86 segment register instructions as unsupported.Guillaume Chatelet2018-10-221-0/+6
| | | | | | | | | | Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53499 llvm-svn: 344906
* [llvm-exegesis] Reject x86 instructions that use non uniform memory accessesGuillaume Chatelet2018-10-221-25/+64
| | | | | | | | | | Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53438 llvm-svn: 344905
* [llvm-exegesis] Mark second-form X87 instructions as unsupported.Clement Courbet2018-10-191-1/+8
| | | | | | | | | | | | | | Summary: We only support the first form because we rely on information that is only available there. Reviewers: gchatelet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53430 llvm-svn: 344782
* [llvm-exegesis] X87 RFP setup code.Clement Courbet2018-10-191-13/+27
| | | | | | | | | | | | | | | | Summary: This was lost during refactoring in rL342644. Fix and simplify simplify value size handling: always go through a 80 bit value, because the value can be 1 byte). Add unit tests. Reviewers: gchatelet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53423 llvm-svn: 344779
* [llvm-exegesis][NFC] Return many CodeTemplates instead of one.Guillaume Chatelet2018-10-151-9/+9
| | | | | | | | | | | | Summary: This is part one of the change where I simply changed the signature of the functions. More work need to be done to actually produce more than one CodeTemplate per instruction. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53209 llvm-svn: 344493
* [llvm-exegesis][NFC] Simplify code at the cost of small code duplicationGuillaume Chatelet2018-10-121-58/+60
| | | | | | | | | | Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53198 llvm-svn: 344351
* [llvm-exegesis][NFC] Pass Instruction instead of bare OpcodeGuillaume Chatelet2018-10-101-6/+4
| | | | llvm-svn: 344145
* [llvm-exegesis][NFC] Code simplificationGuillaume Chatelet2018-10-101-3/+3
| | | | | | | | | | | | Summary: Simplify code by having LLVMState hold the RegisterAliasingTrackerCache. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D53078 llvm-svn: 344143
* [llvm-exegesis][NFC] Use accessors for Operand.Guillaume Chatelet2018-10-091-9/+9
| | | | | | | | | | | | Summary: This moves checking logic into the accessors and makes the structure smaller. It will also help when/if Operand are generated from the TD files. Subscribers: tschuett, courbet, llvm-commits Differential Revision: https://reviews.llvm.org/D52982 llvm-svn: 344028
* [llvm-exegesis][NFC] moving code around.Guillaume Chatelet2018-09-271-12/+12
| | | | | | | | | | | | Summary: Renaming InstructionBuilder into InstructionTemplate and moving code generation tools from MCInstrDescView to CodeTemplate. Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D52592 llvm-svn: 343188
* [llvm-exegesis] Allow benchmarking arbitrary code snippets.Clement Courbet2018-09-251-28/+35
| | | | | | | | | | | | | | | | | Summary: This is a step towards fixing PR38048. Note that right now the measurements are given per instruction. We'll need to give measurements a per code snippet and update the analysis (PR38731). Reviewers: gchatelet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D52041 llvm-svn: 342947
* [llvm-exegesis] Improve Register Setup (roll forward of D51856).Guillaume Chatelet2018-09-201-82/+72
| | | | | | | | | | | | | | Summary: Added function to set a register to a particular value + tests. Add EFLAGS test, use new setRegTo instead of setRegToConstant. Reviewers: courbet, javed.absar Subscribers: llvm-commits, tschuett, mgorny Differential Revision: https://reviews.llvm.org/D52297 llvm-svn: 342644
* Revert rL342465: Added function to set a register to a particular value + tests.Simon Pilgrim2018-09-181-62/+78
| | | | | | rL342465 is breaking the MSVC buildbots. llvm-svn: 342490
* Revert rL342466: [llvm-exegesis] Improve Register Setup.Simon Pilgrim2018-09-181-36/+30
| | | | | | | | | | | | | | | | rL342465 is breaking the MSVC buildbots, but I need to revert this dependent revision as well. Summary: Added function to set a register to a particular value + tests. Add EFLAGS test, use new setRegTo instead of setRegToConstant. Reviewers: courbet, javed.absar Subscribers: mgorny, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D51856 llvm-svn: 342489
* [llvm-exegesis] Improve Register Setup.Guillaume Chatelet2018-09-181-30/+36
| | | | | | | | | | | | | | Summary: Added function to set a register to a particular value + tests. Add EFLAGS test, use new setRegTo instead of setRegToConstant. Reviewers: courbet, javed.absar Subscribers: mgorny, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D51856 llvm-svn: 342466
* Added function to set a register to a particular value + tests.Guillaume Chatelet2018-09-181-78/+62
| | | | llvm-svn: 342465
* Improve Register SetupGuillaume Chatelet2018-09-181-43/+114
| | | | llvm-svn: 342464
* Revert r342148 (and follow-on fix attempts r342154, r342180, r342182, r342193)Nico Weber2018-09-151-7/+8
| | | | | | | Many bots buildling with make have been broken for several days, e.g. http://lab.llvm.org:8011/builders/lld-x86_64-darwin13 llvm-svn: 342336
* [cmake] Fix missing DEPENDS.Richard Diamond2018-09-131-0/+3
| | | | | | Not sure how I didn't catch this. llvm-svn: 342154
* Renovate CMake files in the `llvm-(cfi-verify|exegesis|mca)` tools.Richard Diamond2018-09-131-8/+4
| | | | llvm-svn: 342148
* [llvm-exegesis][NFC] Split BenchmarkRunner classClement Courbet2018-09-131-13/+15
| | | | | | | | | | | | | | | Summary: The snippet-generation part goes to the SnippetGenerator class. This will allow benchmarking arbitrary code (see PR38437). Reviewers: gchatelet Subscribers: mgorny, tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D51979 llvm-svn: 342117
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