summaryrefslogtreecommitdiffstats
path: root/llvm/test
Commit message (Collapse)AuthorAgeFilesLines
* [Sparc] Add sparc to the list of XFAIL architecture. It seems that the ↵Venkatraman Govindaraju2014-01-251-1/+1
| | | | | | llvm-cov test is not supported in big-endian architectures. llvm-svn: 200101
* Add a TBAA CodeGen failure test caseHal Finkel2014-01-251-0/+41
| | | | | | | | | I disabled the use of TBAA in CodeGen in r200093. This adds a test case that demonstrates the problems with inttoptr and TBAA in CodeGen (and, specifically, the problem that causes LLVM to miscompile itself in Release mode). This test will currently fail if -use-tbaa-in-sched-mi is enabled. llvm-svn: 200097
* XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAAHal Finkel2014-01-251-0/+3
| | | | llvm-svn: 200094
* Fix "llvm-objdump -d -r" to show relocations inline for ELF filesMark Seaborn2014-01-251-0/+35
| | | | | | | | | | | | | | | | | | | This fixes a regression introduced by r182908, which broke llvm-objdump's ability to display relocations inline in a disassembly dump for ELF object files. That change removed a SectionRelocMap from Object/ELF.h, which we recreate in llvm-objdump.cpp. I discovered this regression via an out-of-tree test (test/NaCl/X86/pnacl-hides-sandbox-x86-64.ll) which used llvm-objdump. Note that the "Unknown" string in the test output on i386 isn't quite right, but this appears to be a pre-existing bug. Differential Revision: http://llvm-reviews.chandlerc.com/D2559 llvm-svn: 200090
* Reverting r199886 (Prevent repetitive warnings for unrecognized processors ↵Artyom Skrobov2014-01-251-15/+0
| | | | | | and features) llvm-svn: 200083
* This reverts commit r200064 and r200051.Rafael Espindola2014-01-254-137/+78
| | | | | | | | | | | | | | | | | | | r200064 depends on r200051. r200051 is broken: I tries to replace .mips_hack_elf_flags, which is a good thing, but what it replaces it with is even worse. The new emitMipsELFFlags it adds corresponds to no assembly directive, is not marked as a hack and is not even printed to the .s file. The patch also introduces more uses of hasRawTextSupport. The correct way to remove .mips_hack_elf_flags is to have the mips target streamer handle the default flags (and command line options). That way the same code path is used for asm and obj. The streamer interface should *really* correspond to what is printed in the .s file. llvm-svn: 200078
* [LPM] Make LCSSA a utility with a FunctionPass that applies it to allChandler Carruth2014-01-253-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the loops in a function, and teach LICM to work in the presance of LCSSA. Previously, LCSSA was a loop pass. That made passes requiring it also be loop passes and unable to depend on function analysis passes easily. It also caused outer loops to have a different "canonical" form from inner loops during analysis. Instead, we go into LCSSA form and preserve it through the loop pass manager run. Note that this has the same problem as LoopSimplify that prevents enabling its verification -- loop passes which run at the end of the loop pass manager and don't preserve these are valid, but the subsequent loop pass runs of outer loops that do preserve this pass trigger too much verification and fail because the inner loop no longer verifies. The other problem this exposed is that LICM was completely unable to handle LCSSA form. It didn't preserve it and it actually would give up on moving instructions in many cases when they were used by an LCSSA phi node. I've taught LICM to support detecting LCSSA-form PHI nodes and to hoist and sink around them. This may actually let LICM fire significantly more because we put everything into LCSSA form to rotate the loop before running LICM. =/ Now LICM should handle that fine and preserve it correctly. The down side is that LICM has to require LCSSA in order to preserve it. This is just a fact of life for LCSSA. It's entirely possible we should completely remove LCSSA from the optimizer. The test updates are essentially accomodating LCSSA phi nodes in the output of LICM, and the fact that we now completely sink every instruction in ashr-crash below the loop bodies prior to unrolling. With this change, LCSSA is computed only three times in the pass pipeline. One of them could be removed (and potentially a SCEV run and a separate LoopPassManager entirely!) if we had a LoopPass variant of InstCombine that ran InstCombine on the loop body but refused to combine away LCSSA PHI nodes. Currently, this also prevents loop unrolling from being in the same loop pass manager is rotate, LICM, and unswitch. There is one thing that I *really* don't like -- preserving LCSSA in LICM is quite expensive. We end up having to re-run LCSSA twice for some loops after LICM runs because LICM can undo LCSSA both in the current loop and the parent loop. I don't really see good solutions to this other than to completely move away from LCSSA and using tools like SSAUpdater instead. llvm-svn: 200067
* [Mips] Move 2 test cases from MC to CodeGen.Jack Carter2014-01-252-0/+0
| | | | | | No code changes. Just reassignment of test case files. llvm-svn: 200064
* Revert "Revert "Add Constant Hoisting Pass" (r200034)"Juergen Ributzka2014-01-252-2/+71
| | | | | | | This reverts commit r200058 and adds the using directive for ARMTargetTransformInfo to silence two g++ overload warnings. llvm-svn: 200062
* Revert "Add Constant Hoisting Pass" (r200034)Hans Wennborg2014-01-252-71/+2
| | | | | | | | | | | | | | | This commit caused -Woverloaded-virtual warnings. The two new TargetTransformInfo::getIntImmCost functions were only added to the superclass, and to the X86 subclass. The other targets were not updated, and the warning highlighted this by pointing out that e.g. ARMTTI::getIntImmCost was hiding the two new getIntImmCost variants. We could pacify the warning by adding "using TargetTransformInfo::getIntImmCost" to the various subclasses, or turning it off, but I suspect that it's wrong to leave the functions unimplemnted in those targets. The default implementations return TCC_Free, which I don't think is right e.g. for ARM. llvm-svn: 200058
* [Mips] TargetStreamer ELF flag Support for default and commandline options.Jack Carter2014-01-253-34/+93
| | | | | | | | | | | | | | | This patch uses a common MipsTargetSteamer interface for both MipsAsmPrinter and MipsAsmParser for recording default and commandline driven directives that affect ELF header flags. It has been noted that the .ll tests affected by this patch belong in test/Codegen/Mips. I will move them in a separate patch. Also, a number of directives do not get expressed by AsmPrinter in the resultant .s assembly such as setting the correct ASI. I have noted this in the tests and they will be addressed in later patches. llvm-svn: 200051
* [AArch64] Removed unused i8 type from FPR8 register class.Ana Pazos2014-01-241-0/+47
| | | | | | | | | | | | | | | The i8 type is not registered with any register class. This causes a segmentation fault in MachineLICM::getRegisterClassIDAndCost. The code selects the first type associated with register class FPR8, which happens to be i8. It uses this type (i8) to get the representative class pointer, which is 0. It then uses this pointer to access a field, resulting in segmentation fault. Since i8 type is not being used for printing any neon instruction we can safely remove it. llvm-svn: 200046
* Add Constant Hoisting PassJuergen Ributzka2014-01-242-2/+71
| | | | | | | | Retry commit r200022 with a fix for the build bot errors. Constant expressions have (unlike instructions) module scope use lists and therefore may have users in different functions. The fix is to simply ignore these out-of-function uses. llvm-svn: 200034
* Verify that attributes are not lost during linking.Bill Wendling2014-01-242-0/+22
| | | | | | | | We don't want to lose attributes when a function decl without them is merged with a function decl that has them. PR2382 llvm-svn: 200030
* InstCombine: Don't try to use aggregate elements of ConstantExprs.Benjamin Kramer2014-01-241-0/+8
| | | | | | PR18600. llvm-svn: 200028
* Add a testcase for the changes in r199938.Lang Hames2014-01-241-3/+21
| | | | | | <rdar://problem/15611947> llvm-svn: 200027
* Revert "Add Constant Hoisting Pass"Juergen Ributzka2014-01-242-57/+2
| | | | | | This reverts commit r200022 to unbreak the build bots. llvm-svn: 200024
* Add Constant Hoisting PassJuergen Ributzka2014-01-242-2/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pass identifies expensive constants to hoist and coalesces them to better prepare it for SelectionDAG-based code generation. This works around the limitations of the basic-block-at-a-time approach. First it scans all instructions for integer constants and calculates its cost. If the constant can be folded into the instruction (the cost is TCC_Free) or the cost is just a simple operation (TCC_BASIC), then we don't consider it expensive and leave it alone. This is the default behavior and the default implementation of getIntImmCost will always return TCC_Free. If the cost is more than TCC_BASIC, then the integer constant can't be folded into the instruction and it might be beneficial to hoist the constant. Similar constants are coalesced to reduce register pressure and materialization code. When a constant is hoisted, it is also hidden behind a bitcast to force it to be live-out of the basic block. Otherwise the constant would be just duplicated and each basic block would have its own copy in the SelectionDAG. The SelectionDAG recognizes such constants as opaque and doesn't perform certain transformations on them, which would create a new expensive constant. This optimization is only applied to integer constants in instructions and simple (this means not nested) constant cast experessions. For example: %0 = load i64* inttoptr (i64 big_constant to i64*) Reviewed by Eric llvm-svn: 200022
* Fix known typosAlp Toker2014-01-2423-45/+45
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. llvm-svn: 200018
* InstSimplify: Make shift, select and GEP simplifications vector-aware.Benjamin Kramer2014-01-243-1/+73
| | | | llvm-svn: 200016
* Don't use "llc -filetype=obj" now that the codepath is the same.Rafael Espindola2014-01-243-3/+3
| | | | | | | r200011 remove the special codepaths in MC for inline asm, so we can now test all the logic with just llc + llvm-mc. llvm-svn: 200013
* Revert "Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for a"Eric Christopher2014-01-242-5/+3
| | | | | | | | in order to fix the cygwin/mingw bots. This reverts commit r199990. llvm-svn: 199991
* Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for aEric Christopher2014-01-242-3/+5
| | | | | | | | compile unit. Make these relocations on the platforms that need relocations and add a routine to ensure that we don't put the addresses in an offset table for split dwarf. llvm-svn: 199990
* [AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.Kevin Qin2014-01-241-1/+12
| | | | llvm-svn: 199978
* [X86] Prevent the creation of redundant ops for sadd and ssub with overflow.Juergen Ributzka2014-01-241-0/+34
| | | | | | | | | | | | | This commit teaches the X86 backend to create the same X86 instructions when it lowers an sadd/ssub with overflow intrinsic and a conditional branch that uses that overflow result. This allows SelectionDAG to recognize and remove one of the redundant operations. This fixes <rdar://problem/15874016> and <rdar://problem/15661073>. Reviewed by Nadav llvm-svn: 199976
* Implement atomicrmw operations in 32 and 64 bits for SPARCv9.Jakob Stoklund Olesen2014-01-241-1/+82
| | | | | | These all use the compare-and-swap CASA/CASXA instructions. llvm-svn: 199975
* [Sparc] Correct quad register list in the asm parser.Venkatraman Govindaraju2014-01-242-0/+12
| | | | | | Add test cases to check parsing of v9 double registers and their aliased quad registers. llvm-svn: 199974
* Make the use of DW_AT_ranges in the compile unit depend also uponEric Christopher2014-01-231-0/+96
| | | | | | the existence of comdat/special sections. llvm-svn: 199954
* Update the X86 assembler for .intel_syntax to produce an error for invalid baseKevin Enderby2014-01-231-0/+7
| | | | | | | | | registers in memory addresses that do not match the index register. As it does for .att_syntax. rdar://15887380 llvm-svn: 199948
* Update the X86 assembler for .intel_syntax to produce an error for invalidKevin Enderby2014-01-231-0/+11
| | | | | | | | | | | scale factors in memory addresses. As it does for .att_syntax. It was producing: Assertion failed: (((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) && "Invalid scale!"), function CreateMem, file /Volumes/SandBox/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp, line 1133. rdar://14967214 llvm-svn: 199942
* Replace vfmaddxx213 instructions with their 231-type equivalents in accumulatorLang Hames2014-01-231-0/+15
| | | | | | | loops. Writing back to the accumulator (231-type) allows the coalescer to eliminate an extra copy. llvm-svn: 199933
* Note the PR number.Rafael Espindola2014-01-231-0/+1
| | | | llvm-svn: 199932
* [Thumbv8] Fix the value of BLXOperandIndex of isV8EligibleForITWeiming Zhao2014-01-232-3/+23
| | | | | | | | | Originally, BLX was passed as operand #0 in MachineInstr and as operand #2 in MCInst. But now, it's operand #2 in both cases. This patch also removes unnecessary FileCheck in the test case added by r199127. llvm-svn: 199928
* Move test to x86 directory.Eric Christopher2014-01-231-0/+0
| | | | llvm-svn: 199927
* [AArch64] Added vselect patterns with float and double typesAna Pazos2014-01-231-0/+13
| | | | llvm-svn: 199925
* Avoid emitting a DWARF type attribute for an ObjC property of typeEric Christopher2014-01-231-0/+104
| | | | | | | | void. Patch by Scott Talbot. llvm-svn: 199924
* R600: Disable the BFE patternTom Stellard2014-01-231-0/+2
| | | | | | | | | | This pattern uses an SDNodeXForm, which isn't being emitted for some reason. I can get it to work by attaching the PatLeaf that has the XForm to the argument in the output pattern, but this results in an immediate being used in a register operand, which the backend can't handle yet. llvm-svn: 199918
* R600: Correctly handle vertex fetch clauses the precede ENDIFsTom Stellard2014-01-231-0/+29
| | | | | | | | The control flow finalizer would sometimes use an ALU_POP_AFTER instruction before the vetex fetch clause instead of using a POP instruction after it. llvm-svn: 199917
* R600: Unconditionally unroll loops that contain GEPs with alloca pointersTom Stellard2014-01-231-0/+37
| | | | | | | | | | | | Implement the getUnrollingPreferences() function for AMDGPUTargetTransformInfo so that loops that do address calculations on pointers derived from alloca are unconditionally unrolled. Unrolling these loops makes it more likely that SROA will be able to eliminate the allocas, which is a big win for R600 since memory allocated by alloca (private memory) is really slow. llvm-svn: 199916
* Move a unit test into the correct dir. Sorry if it broke Mips-only builds.Andrew Trick2014-01-231-0/+0
| | | | llvm-svn: 199911
* Remove tail marker when changing an argument to an alloca.Rafael Espindola2014-01-231-0/+19
| | | | | | | | | | Argument promotion can replace an argument of a call with an alloca. This requires clearing the tail marker as it is very likely that the callee is now using an alloca in the caller. This fixes pr14710. llvm-svn: 199909
* R600: Recommit 199842: Add work-around for the CF stack entry HW bugTom Stellard2014-01-231-0/+227
| | | | | | | | | | | | | | | | | | The unit test is now disabled on non-asserts builds. The CF stack can be corrupted if you use CF_ALU_PUSH_BEFORE, CF_ALU_ELSE_AFTER, CF_ALU_BREAK, or CF_ALU_CONTINUE when the number of sub-entries on the stack is greater than or equal to the stack entry size and sub-entries modulo 4 is either 0 or 3 (on cedar the bug is present when number of sub-entries module 8 is either 7 or 0) We choose to be conservative and always apply the work-around when the number of sub-enries is greater than or equal to the stack entry size, so that we can safely over-allocate the stack when we are unsure of the stack allocation rules. reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 199905
* [Object][ELF][Mips] Print symbol name for MIPS ELF relocations.Simon Atanasyan2014-01-232-1/+11
| | | | llvm-svn: 199898
* AVX-512: added VPERM2D VPERM2Q VPERM2PS VPERM2PD instructions,Elena Demikhovsky2014-01-231-7/+7
| | | | | | they give better sequences than VPERMI llvm-svn: 199893
* ARM: use litpools for normal i32 imms when compiling minsize.Tim Northover2014-01-231-0/+57
| | | | | | | | | With constant-sharing, litpool loads consume 4 + N*2 bytes of code, but movw/movt pairs consume 8*N. This means litpools are better than movw/movt even with just one use. Other materialisation strategies can still be better though, so the logic is a little odd. llvm-svn: 199891
* Prevent repetitive warnings for unrecognized processors and featuresArtyom Skrobov2014-01-231-0/+15
| | | | llvm-svn: 199886
* [LPM] Make LoopSimplify no longer a LoopPass and instead both a utilityChandler Carruth2014-01-231-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | function and a FunctionPass. This has many benefits. The motivating use case was to be able to compute function analysis passes *after* running LoopSimplify (to avoid invalidating them) and then to run other passes which require LoopSimplify. Specifically passes like unrolling and vectorization are critical to wire up to BranchProbabilityInfo and BlockFrequencyInfo so that they can be profile aware. For the LoopVectorize pass the only things in the way are LoopSimplify and LCSSA. This fixes LoopSimplify and LCSSA is next on my list. There are also a bunch of other benefits of doing this: - It is now very feasible to make more passes *preserve* LoopSimplify because they can simply run it after changing a loop. Because subsequence passes can assume LoopSimplify is preserved we can reduce the runs of this pass to the times when we actually mutate a loop structure. - The new pass manager should be able to more easily support loop passes factored in this way. - We can at long, long last observe that LoopSimplify is preserved across SCEV. This *halves* the number of times we run LoopSimplify!!! Now, getting here wasn't trivial. First off, the interfaces used by LoopSimplify are all over the map regarding how analysis are updated. We end up with weird "pass" parameters as a consequence. I'll try to clean at least some of this up later -- I'll have to have it all clean for the new pass manager. Next up I discovered a really frustrating bug. LoopUnroll *claims* to preserve LoopSimplify. That's actually a lie. But the way the LoopPassManager ends up running the passes, it always ran LoopSimplify on the unrolled-into loop, rectifying this oversight before any verification could kick in and point out that in fact nothing was preserved. So I've added code to the unroller to *actually* simplify the surrounding loop when it succeeds at unrolling. The only functional change in the test suite is that we now catch a case that was previously missed because SCEV and other loop transforms see their containing loops as simplified and thus don't miss some opportunities. One test case has been converted to check that we catch this case rather than checking that we miss it but at least don't get the wrong answer. Note that I have #if-ed out all of the verification logic in LoopSimplify! This is a temporary workaround while extracting these bits from the LoopPassManager. Currently, there is no way to have a pass in the LoopPassManager which preserves LoopSimplify along with one which does not. The LPM will try to verify on each loop in the nest that LoopSimplify holds but the now-Function-pass cannot distinguish what loop is being verified and so must try to verify all of them. The inner most loop is clearly no longer simplified as there is a pass which didn't even *attempt* to preserve it. =/ Once I get LCSSA out (and maybe LoopVectorize and some other fixes) I'll be able to re-enable this check and catch any places where we are still failing to preserve LoopSimplify. If this causes problems I can back this out and try to commit *all* of this at once, but so far this seems to work and allow much more incremental progress. llvm-svn: 199884
* [AArch64]Add CHECK for two test cases testing scalar_to_vector committed in ↵Hao Liu2014-01-231-6/+19
| | | | | | r199461. llvm-svn: 199861
* [Mips] TargetStreamer Support for .set mips16.Jack Carter2014-01-221-1/+4
| | | | | | | | | | This patch updates .set mips16 support which affects the ELF ABI and its flags. In addition the patch uses a common interface for both the MipsTargetSteamer and MipsObjectStreamer that the assembler uses for both ELF and ASCII output for these directives. llvm-svn: 199851
* Revert r162101 and replace it with a solution that works for targets where ↵Owen Anderson2014-01-221-1/+1
| | | | | | | | | | the pointer type is illegal. This is a horrible bit of code. We're calling a simplification routine *in the middle* of type legalization. We tell the simplification routine that it's running after legalization, but some of the types it will encounter will be illegal! The fix is only to invoke the simplification if the types in question were legal, so that none of its invariants will be violated. llvm-svn: 199847
OpenPOWER on IntegriCloud