Add Constant Hoisting Pass

This pass identifies expensive constants to hoist and coalesces them to
better prepare it for SelectionDAG-based code generation. This works around the
limitations of the basic-block-at-a-time approach.

First it scans all instructions for integer constants and calculates its
cost. If the constant can be folded into the instruction (the cost is
TCC_Free) or the cost is just a simple operation (TCC_BASIC), then we don't
consider it expensive and leave it alone. This is the default behavior and
the default implementation of getIntImmCost will always return TCC_Free.

If the cost is more than TCC_BASIC, then the integer constant can't be folded
into the instruction and it might be beneficial to hoist the constant.
Similar constants are coalesced to reduce register pressure and
materialization code.

When a constant is hoisted, it is also hidden behind a bitcast to force it to
be live-out of the basic block. Otherwise the constant would be just
duplicated and each basic block would have its own copy in the SelectionDAG.
The SelectionDAG recognizes such constants as opaque and doesn't perform
certain transformations on them, which would create a new expensive constant.

This optimization is only applied to integer constants in instructions and
simple (this means not nested) constant cast experessions. For example:
%0 = load i64* inttoptr (i64 big_constant to i64*)

Reviewed by Eric

llvm-svn: 200022

2 files changed, 57 insertions, 2 deletions

diff --git a/llvm/test/CodeGen/ARM/memcpy-inline.ll b/llvm/test/CodeGen/ARM/memcpy-inline.ll
index 946c63ed40c..14d84deea81 100644
--- a/llvm/test/CodeGen/ARM/memcpy-inline.ll
+++ b/llvm/test/CodeGen/ARM/memcpy-inline.ll
@@ -38,7 +38,8 @@ entry:
 define void @t2(i8* nocapture %C) nounwind {
 entry:
 ; CHECK-LABEL: t2:
-; CHECK: ldr [[REG2:r[0-9]+]], [r1, #32]
+; CHECK: movw [[REG2:r[0-9]+]], #16716
+; CHECK: movt [[REG2:r[0-9]+]], #72
 ; CHECK: str [[REG2]], [r0, #32]
 ; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r1]
 ; CHECK: vst1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0]
@@ -79,7 +80,8 @@ entry:
 ; CHECK: strb [[REG5]], [r0, #6]
 ; CHECK: movw [[REG6:r[0-9]+]], #21587
 ; CHECK: strh [[REG6]], [r0, #4]
-; CHECK: ldr [[REG7:r[0-9]+]], 
+; CHECK: movw [[REG7:r[0-9]+]], #18500
+; CHECK: movt [[REG7:r[0-9]+]], #22866
 ; CHECK: str [[REG7]]
   tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8]* @.str5, i64 0, i64 0), i64 7, i32 1, i1 false)
   ret void
diff --git a/llvm/test/CodeGen/X86/large-constants.ll b/llvm/test/CodeGen/X86/large-constants.ll
new file mode 100644
index 00000000000..a75a90a3132
--- /dev/null
+++ b/llvm/test/CodeGen/X86/large-constants.ll
@@ -0,0 +1,53 @@
+; RUN: llc < %s -mtriple=x86_64-darwin -mcpu=corei7 | grep movabsq | count 2
+
+define i64 @constant_hoisting(i64 %o0, i64 %o1, i64 %o2, i64 %o3, i64 %o4, i64 %o5) {
+entry:
+  %l0 = and i64 %o0, -281474976710654
+  %c0 = icmp ne i64 %l0, 0
+  br i1 %c0, label %fail, label %bb1
+
+bb1:
+  %l1 = and i64 %o1, -281474976710654
+  %c1 = icmp ne i64 %l1, 0
+  br i1 %c1, label %fail, label %bb2
+
+bb2:
+  %l2 = and i64 %o2, -281474976710654
+  %c2 = icmp ne i64 %l2, 0
+  br i1 %c2, label %fail, label %bb3
+
+bb3:
+  %l3 = and i64 %o3, -281474976710654
+  %c3 = icmp ne i64 %l3, 0
+  br i1 %c3, label %fail, label %bb4
+
+bb4:
+  %l4 = and i64 %o4, -281474976710653
+  %c4 = icmp ne i64 %l4, 0
+  br i1 %c4, label %fail, label %bb5
+
+bb5:
+  %l5 = and i64 %o5, -281474976710652
+  %c5 = icmp ne i64 %l5, 0
+  br i1 %c5, label %fail, label %bb6
+
+bb6:
+  ret i64 %l5
+
+fail:
+  ret i64 -1
+}
+
+define void @constant_expressions() {
+entry:
+  %0 = load i64* inttoptr (i64 add (i64 51250129900, i64 0) to i64*)
+  %1 = load i64* inttoptr (i64 add (i64 51250129900, i64 8) to i64*)
+  %2 = load i64* inttoptr (i64 add (i64 51250129900, i64 16) to i64*)
+  %3 = load i64* inttoptr (i64 add (i64 51250129900, i64 24) to i64*)
+  %4 = add i64 %0, %1
+  %5 = add i64 %2, %3
+  %6 = add i64 %4, %5
+  store i64 %6, i64* inttoptr (i64 add (i64 51250129900, i64 0) to i64*)
+  ret void
+}
+