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* [ValueTracking] Improve isImpliedCondition for conditions with matching ↵Chad Rosier2016-04-192-0/+507
| | | | | | | | | | | | | | | operands. This patch improves SimplifyCFG to catch cases like: if (a < b) { if (a > b) <- known to be false unreachable; } Phabricator Revision: http://reviews.llvm.org/D18905 llvm-svn: 266767
* Fix Gold test after r266750 (ModuleLinker: Do not import linkonce/weak as ↵Mehdi Amini2016-04-192-2/+2
| | | | | | | "external_weak") From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266752
* ModuleLinker: Do not import linkonce/weak as "external_weak"Mehdi Amini2016-04-191-2/+2
| | | | | | | | | | | | | | | Summary: There is no reason to have a weak reference because the external definition will be weak. Reviewers: rafael Subscribers: llvm-commits, tejohnson Differential Revision: http://reviews.llvm.org/D19267 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266750
* IR: getOrInsertODRUniquedType => DICompositeType::getODRType, NFCDuncan P. N. Exon Smith2016-04-191-2/+2
| | | | | | | | | | | | | | Lift the API for debug info ODR type uniquing up a layer. Instead of clients managing the map directly on the LLVMContext, add a static method to DICompositeType called getODRType and handle the map in the background. Also adds DICompositeType::getODRTypeIfExists, so far just for convenience in the unit tests. This simplifies the logic in LLParser and BitcodeReader. Because of argument spam there are actually a few more lines of code now; I'll see if I come up with a reasonable way to clean that up. llvm-svn: 266742
* [InstCombine][X86] Added extra tests introduced for D17490Simon Pilgrim2016-04-194-0/+578
| | | | llvm-svn: 266732
* [InstCombine][X86] Regenerate SSE combine tests as part of setup for D17490Simon Pilgrim2016-04-196-468/+581
| | | | | | Regenerated with utils/update_test_checks.py llvm-svn: 266731
* [X86][AVX2] Prefer VPERMQ/VPERMPD over VINSERTI128/VINSERTF128 for unary ↵Simon Pilgrim2016-04-195-32/+48
| | | | | | | | | | shuffles Using VPERMQ/VPERMPD allows memory folding of the (repeated) input where VINSERTI128/VINSERTF128 can not. Differential Revision: http://reviews.llvm.org/D19228 llvm-svn: 266728
* Introduce a "patchable-function" function attributeSanjoy Das2016-04-194-6/+49
| | | | | | | | | | | | | | | | | Summary: The `"patchable-function"` attribute can be used by an LLVM client to influence LLVM's code generation in ways that makes the generated code easily patchable at runtime (for instance, to redirect control). Right now only one patchability scheme is supported, `"prologue-short-redirect"`, but this can be expanded in the future. Reviewers: joker.eph, rnk, echristo, dberris Subscribers: joker.eph, echristo, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D19046 llvm-svn: 266715
* BitcodeWriter: Break recursion when enumerating Metadata, almost NFCDuncan P. N. Exon Smith2016-04-191-6/+6
| | | | | | | | | | | Use a worklist instead of recursing through MDNode operands in ValueEnumerator. The actual record output order has changed slightly, but otherwise there's no functionality change. I had to update test/Bitcode/metadata-function-blocks.ll. I renumbered nodes so they continue to match the implicit record ids. llvm-svn: 266709
* Port DemandedBits to the new pass manager.Michael Kuperstein2016-04-181-2/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D18679 llvm-svn: 266699
* [DWARF] Force a linkage_name on an inlined subprogram's abstract origin.Paul Robinson2016-04-188-9/+82
| | | | | | | | | | | | | When we suppress linkage names, for a non-inlined subprogram the name can still be found in the object-file symbol table, because we have the code address of the subprogram. This is not necessarily the case for an inlined subprogram, so we still want to emit the linkage name in the DWARF. Put this on the abstract-origin DIE because it's common to all inlined instances. Differential Revision: http://reviews.llvm.org/D18706 llvm-svn: 266692
* ARM: use a pseudo-instruction for cmpxchg at -O0.Tim Northover2016-04-184-3/+84
| | | | | | | | | | | | | | | | | The fast register-allocator cannot cope with inter-block dependencies without spilling. This is fine for ldrex/strex loops coming from atomicrmw instructions where any value produced within a block is dead by the end, but not for cmpxchg. So we lower a cmpxchg at -O0 via a pseudo-inst that gets expanded after regalloc. Fortunately this is at -O0 so we don't have to care about performance. This simplifies the various axes of expansion considerably: we assume a strong seq_cst operation and ensure ordering via the always-present DMB instructions rather than v8 acquire/release instructions. Should fix the 32-bit part of PR25526. llvm-svn: 266679
* [X86][SSE] Test case for PR2585Simon Pilgrim2016-04-181-0/+32
| | | | llvm-svn: 266669
* [X86][AVX] Added extra memory folding tests for D19228Simon Pilgrim2016-04-181-0/+25
| | | | llvm-svn: 266662
* [ValueTracking] Correct lit test comments. NFC.Chad Rosier2016-04-181-2/+2
| | | | llvm-svn: 266657
* [BPI] Consider deoptimize calls as "unreachable"Sanjoy Das2016-04-181-0/+20
| | | | | | | | | | | | | | Summary: Calls to @llvm.experimental.deoptimize are expected to "never execute", so optimize them as such. Reviewers: chandlerc Subscribers: junbuml, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D19095 llvm-svn: 266654
* Port InstrProfiling pass to the new pass managerXinliang David Li2016-04-186-0/+7
| | | | | | Differential Revision: http://reviews.llvm.org/D18126 llvm-svn: 266637
* [X86][AVX] Added zero+blend vs vperm2f128 optsize tests cases (PR22984)Simon Pilgrim2016-04-181-0/+69
| | | | | | We should be trying to use vperm2f128 instead of zero+blend (if we're only the user of zero?) when optsize is enabled. llvm-svn: 266632
* [AMDGPU] Add insert nops pass based on subtarget features instead of cl::optKonstantin Zhuravlyov2016-04-181-0/+75
| | | | | | | | | | | Also, - Skip pass if machine module does not have debug info - Minor comment changes - Added test Differential Revision: http://reviews.llvm.org/D19079 llvm-svn: 266626
* [X86][AVX] Renamed vperm2f128 test to make it quicker to reviewSimon Pilgrim2016-04-181-23/+23
| | | | | | missed one the first time round... llvm-svn: 266623
* [X86][AVX] Renamed vperm2f128 tests to make it quicker to reviewSimon Pilgrim2016-04-181-79/+79
| | | | llvm-svn: 266621
* Reapply "[Coverage] Prevent detection of false instantiations in case of ↵Igor Kudrin2016-04-185-1/+52
| | | | | | | | | | | | | | | | | | macro expansion." The root of the problem was that findMainViewFileID(File, Function) could return some ID for any given file, even though that file was not the main file for that function. This patch ensures that the result of this function is conformed with the result of findMainViewFileID(Function). This commit reapplies r266436, which was reverted by r266458, with the .covmapping file serialized in v1 format. Differential Revision: http://reviews.llvm.org/D18787 llvm-svn: 266620
* Revert "Replace the use of MaxFunctionCount module flag"Eric Liu2016-04-182-38/+16
| | | | | | | | | | This reverts commit r266477. This commit introduces cyclic dependency. This commit has "Analysis" depend on "ProfileData", while "ProfileData" depends on "Object", which depends on "BitCode", which depends on "Analysis". llvm-svn: 266619
* [AMDGPU][llvm-mc] s_setreg* - Fix order of operandsArtem Tamazov2016-04-182-8/+8
| | | | | | | | Order should match the sp3 syntax, where destination (simm16 denoting the hwreg) is coming first. Differential Revision: http://reviews.llvm.org/D19161 llvm-svn: 266617
* [mips][ias] Prevent double-filling of delay slots by generating '.set ↵Daniel Sanders2016-04-181-0/+10
| | | | | | | | | | | | | | | | | | noreorder' regions. Summary: When clang is given -save-temps or -via-file-asm, any inline assembly in the source is parsed twice. Once by the compiler, and again by the assembler. We must take care to ensure that this doesn't lead to double-filling delay slots. Reviewers: sdardis, vkalintiris Subscribers: dsanders, sdardis, llvm-commits Differential Revision: http://reviews.llvm.org/D19166 llvm-svn: 266608
* [ARM] AArch32 v8 NEON is still not IEEE-754 compliantRenato Golin2016-04-181-14/+8
| | | | llvm-svn: 266603
* [PowerPC] add comment to testStrahinja Petrovic2016-04-181-0/+2
| | | | | | | Added comment in test for soft-float operations on ppc architecture. Test commit. llvm-svn: 266600
* Declare MVT::SimpleValueType as an int8_t sized enum. This removes 400 bytes ↵Craig Topper2016-04-171-1/+1
| | | | | | | | | | from TargetLoweringBase and probably other places. This required changing several places to print VT enums as strings instead of raw ints since the proper method to use to print became ambiguous. This is probably an improvement anyway. This also appears to save ~8K from an x86 self host build of llc. llvm-svn: 266562
* [X86][SSE] Added 16i8 -> 8i64 sext testSimon Pilgrim2016-04-171-1/+125
| | | | | | Shows poor codegen for AVX2 llvm-svn: 266560
* [AVX512] ISD::MUL v2i64/v4i64 should only be legal if DQI and VLX features ↵Craig Topper2016-04-171-0/+122
| | | | | | are enabled. llvm-svn: 266554
* IR: Fix type-refs in testcase from r266548Duncan P. N. Exon Smith2016-04-171-11/+11
| | | | | | | | | | | | | | | | | There's a hole in the verifier right now: if a module has no compile units, it never checks that all the string-based DITypeRefs get resolved. As a result, this testcase didn't fail the verifier, even there were references to `!"has-uuid"` instead of `!"uuid"` (the former was a composite type's 'name:' field, the latter its 'identifier:' field). I'm currently working on removing string-based type refs entirely, and this testcase started failing (because the upgrade script can't resolve the type refs). Rather than fixing the (about-to-be-removed) hole in the verifier, I'm just going to fix the test so that my upgrade script handles it. llvm-svn: 266553
* Fix a typo in rL265762Sanjoy Das2016-04-171-0/+12
| | | | | | | | | I accidentally replaced `mayBeOverridden` with `!isInterposable`. Remove the negation and add a test case that would've caught this. Many thanks to Håkan Hjort for spotting this! llvm-svn: 266551
* IR: Use an explicit map for debug info type uniquingDuncan P. N. Exon Smith2016-04-172-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than relying on the structural equivalence of DICompositeType to merge type definitions, use an explicit map on the LLVMContext that LLParser and BitcodeReader consult when constructing new nodes. Each non-forward-declaration DICompositeType with a non-empty 'identifier:' field is stored/loaded from the type map, and the first definiton will "win". This map is opt-in: clients that expect ODR types from different modules to be merged must call LLVMContext::ensureDITypeMap. - Clients that just happen to load more than one Module in the same LLVMContext won't magically merge types. - Clients (like LTO) that want to continue to merge types based on ODR identifiers should opt-in immediately. I have updated LTOCodeGenerator.cpp, the two "linking" spots in gold-plugin.cpp, and llvm-link (unless -disable-debug-info-type-map) to set this. With this in place, it will be straightforward to remove the DITypeRef concept (i.e., referencing types by their 'identifier:' string rather than pointing at them directly). llvm-svn: 266549
* IR: Use ODR to unique DICompositeType membersDuncan P. N. Exon Smith2016-04-172-0/+58
| | | | | | | | | | | | | | Merge members that are describing the same member of the same ODR type, even if other bits differ. If the file or line differ, we don't care; if anything else differs, it's an ODR violation (and we still don't really care). For DISubprogram declarations, this looks at the LinkageName and Scope. For DW_TAG_member instances of DIDerivedType, this looks at the Name and Scope. In both cases, we know that the Scope follows ODR rules if it has a non-empty identifier. llvm-svn: 266548
* Linker: Clarify test/Linker/type-unique-odr-a.ll, NFCDuncan P. N. Exon Smith2016-04-171-17/+23
| | | | | | | | | | | | | | Split up the long RUN and clarify the CHECK lines: - Explicitly confirm there are no other subprograms inside of "A". - Remove checks for "bar" and "baz", which were just implicitly checking that there were no other subprograms inside of "A". This prepares for adding a RUN line which links the two files in the opposite direction. llvm-svn: 266543
* [X86][AVX] Add shuffle combine tests for MOVDDUP/MOVSHDUP/MOVSLDUPSimon Pilgrim2016-04-162-0/+121
| | | | | | 128, 256 and 512 bit implementations (some not yet supported by combineX86ShuffleChain) llvm-svn: 266535
* [X86][XOP] Added VPPERM constant mask decoding and target shuffle combining ↵Simon Pilgrim2016-04-161-3/+16
| | | | | | | | support Added additional test that peeks through bitcast to v16i8 mask llvm-svn: 266533
* [X86][XOP] More VPPERM shuffle mask decode testsSimon Pilgrim2016-04-161-0/+104
| | | | | | As requested by D18441 llvm-svn: 266531
* ThinLTO: Make aliases explicit in the summaryMehdi Amini2016-04-164-3/+64
| | | | | | | | | | | To be able to work accurately on the reference graph when taking decision about internalizing, promoting, renaming, etc. We need to have the alias information explicit. Differential Revision: http://reviews.llvm.org/D18836 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266517
* Replace hardcoded comment at 'lit.site.cfg.in'Alex Denisov2016-04-162-4/+4
| | | | | | | | | | | | At the moment almost every lit.site.cfg.in contains two lines comment: ## Autogenerated by LLVM/Clang configuration. # Do not edit! The patch adds variable LIT_SITE_CFG_IN_HEADER, that is replaced from configure_lit_site_cfg with the note and some useful information. llvm-svn: 266515
* AMDGPU: Enable LocalStackSlotAllocation passMatt Arsenault2016-04-162-20/+72
| | | | | | | | | | | This resolves more frame indexes early and folds the immediate offsets into the scratch mubuf instructions. This cleans up a lot of the mess that's currently emitted, such as emitting add 0s and repeatedly initializing the same register to 0 when spilling. llvm-svn: 266508
* AMDGPU: Use s_addk_i32 / s_mulk_i32Matt Arsenault2016-04-165-6/+140
| | | | llvm-svn: 266506
* Don't skip splitSeparateComponents in eliminateDeadDefs for ↵Wei Mi2016-04-151-1/+1
| | | | | | | | | | | | | | | | | | HoistSpillHelper::hoistAllSpills. Because HoistSpillHelper::hoistAllSpills is called in postOptimization, before the patch we didn't want LiveRangeEdit::eliminateDeadDefs to call splitSeparateComponents and generate unassigned new vregs. However, skipping splitSeparateComponents will make verify-machineinstrs unhappy, so I remove the early return, and use HoistSpillHelper::LRE_DidCloneVirtReg to assign physreg/stackslot for those new vregs. In addition, some code reorganization to make class HoistSpillHelper privately inheriting from LiveRangeEdit::Delegate possible. This is to be consistent with class RAGreedy and class RegisterCoalescer. Differential Revision: http://reviews.llvm.org/D19142 llvm-svn: 266489
* [cfi] Support explicit sections for functions in cfi-icall.Evgeniy Stepanov2016-04-151-0/+26
| | | | | | | | | | Allow explicit section for indirectly called functions in cfi-icall. Jumptables for functions in the same type class must be contiguous, so they always go to the default text section. Fixes PR25079. llvm-svn: 266486
* Convert this sample-based-profiling testcase to use a NoDebug CU.Adrian Prantl2016-04-151-4/+1
| | | | llvm-svn: 266481
* Switch lowering: don't add incoming PHI values from skipped bit test MBB's ↵Hans Wennborg2016-04-151-2/+32
| | | | | | | | | | | (PR27135) After r245976, LLVM will skip the last bit test case if knows it will always be true. However, we would still erroneously update PHI nodes with incoming values from the MBB that would perform the final bit test, causing -verify-machineinstrs to fail. llvm-svn: 266479
* Replace the use of MaxFunctionCount module flagEaswaran Raman2016-04-152-16/+38
| | | | | | | | Adds an interface to get ProfileSummary for a module and makes InlineCost use ProfileSummary to get max function count. Differential Revision: http://reviews.llvm.org/D18622 llvm-svn: 266477
* Let the DISubprogram in this test point to the right compile unit.Adrian Prantl2016-04-151-1/+1
| | | | llvm-svn: 266468
* Update testcase to new debug metadata format.Adrian Prantl2016-04-151-3/+2
| | | | llvm-svn: 266467
* ARM: don't try to hoist constant RHS out of a division.Tim Northover2016-04-151-0/+45
| | | | | | | | | | | | Divisions by a constant can be converted into multiplies which are usually cheaper, but this isn't possible if the constant gets separated (particularly in loops). Fix this by telling ConstantHoisting that the immediate in a DIV is cheap. I considered making the check generic, but neither AArch64 (strangely) nor x86 showed any benefit on the tests I had. llvm-svn: 266464
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