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* [SDAG] Fix Stale SDNode usage in visitANDNirav Dave2017-03-281-0/+31
* [x86] add AVX2 run to show 256-bit opportunity; NFCSanjay Patel2017-03-281-17/+17
* [AArch64] [Assembler] option to disable negative immediate conversionsSanne Wouda2017-03-282-0/+30
* [GlobalISel][X86] support G_FRAME_INDEX instruction selection.Igor Breger2017-03-283-49/+99
* rename instcombine test file. NFCAnna Thomas2017-03-281-0/+0
* Dont emit Mapping symbols for sections that contain only data.Weiming Zhao2017-03-2813-18/+83
* Revert "[asan] Delay creation of asan ctor."Alex Shlyapnikov2017-03-271-2/+2
* Revert "[asan] Put ctor/dtor in comdat."Alex Shlyapnikov2017-03-272-13/+1
* [ARM] Mark falky test unsupported until we find the causeRenato Golin2017-03-271-1/+1
* Improve machine schedulers for in-order processorsJaved Absar2017-03-271-0/+86
* Add the error handling for Mach-O dyld compact lazy bind, weak bind andKevin Enderby2017-03-2720-1/+58
* [LV] Transform truncations of non-primary induction variablesMatthew Simpson2017-03-271-0/+45
* [GlobalISel][AArch64] Fold FI into LDR/STR ui addressing mode.Ahmed Bougacha2017-03-272-0/+66
* [GlobalISel][AArch64] Fold G_GEP into LDR/STR ui addressing mode.Ahmed Bougacha2017-03-272-0/+468
* [GlobalISel][AArch64] Select store of zero to WZR/XZR.Ahmed Bougacha2017-03-271-0/+56
* [GlobalISel][AArch64] Select CBZ.Ahmed Bougacha2017-03-271-0/+108
* [GlobalISel][AArch64] Use proper constant types in test. NFC.Ahmed Bougacha2017-03-271-2/+2
* [AMDGPU][MC] Fix for Bug 28207 + LIT testsDmitry Preobrazhensky2017-03-271-1/+131
* [AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as not having side effects.Chad Rosier2017-03-271-0/+60
* [InstCombine] Avoid incorrect folding of select into phi nodes when incoming ...Anna Thomas2017-03-271-0/+38
* [X86][AVX2] bugzilla bug 21281 Performance regression in vector interleave in...Gadi Haber2017-03-272-56/+34
* [LoopUnroll] Remap references in peeled iterationSerge Pavlov2017-03-261-0/+61
* [X86][SSE] Add computeKnownBitsForTargetNode support for (V)PSLL/(V)PSRL inst...Simon Pilgrim2017-03-261-1/+0
* [X86][AVX512F] Fix reg class for VMOVSSZrr/VMOVSSZrrk and VMOVSDZrr/VMOVSDZrrkSimon Pilgrim2017-03-261-6/+6
* Regenerate testSimon Pilgrim2017-03-261-1/+1
* Regenerate testSimon Pilgrim2017-03-261-7/+7
* Regenerate tests to remove duplicated checksSimon Pilgrim2017-03-261-241/+118
* [GlobalISel][X86] support G_FRAME_INDEX instruction selection.Igor Breger2017-03-262-0/+66
* Split the SimplifyCFG pass into two variants.Joerg Sonnenberger2017-03-266-12/+13
* [IR] Make SwitchInst::CaseIt almost a normal iterator.Chandler Carruth2017-03-261-2/+2
* [X86][SSE] Combine (VSRLI (VSRAI X, Y), (NumSignBits-1)) -> (VSRLI X, (NumSig...Simon Pilgrim2017-03-251-1/+0
* Change the default attributes for llvm.prefetch to inaccessiblemem_or_argmemonlyEric Christopher2017-03-257-18/+58
* [X86][SSE] Added ComputeNumSignBitsForTargetNode support for (V)PSRAISimon Pilgrim2017-03-251-2/+2
* [x86] use PMOVMSK to replace memcmp libcalls for 16-byte equalitySanjay Patel2017-03-251-11/+9
* [X86][SSE] Add extra computeNumSignBits test case for D31311.Simon Pilgrim2017-03-251-0/+47
* [AMDGPU] Switch data layout by triple environment amdgizYaxun Liu2017-03-252-0/+22
* [asan] Put ctor/dtor in comdat.Evgeniy Stepanov2017-03-252-1/+13
* [ARM] Fix mixup between Lo and Hi in SMLALBB formation.Eli Friedman2017-03-251-84/+84
* [codeview] Don't assert when the user violates the ODRReid Kleckner2017-03-241-0/+100
* [x86] add 32-bit RUN for better memcmp coverage; NFCSanjay Patel2017-03-241-102/+244
* AMDGPU: Fix annotating loops with nested loop conditionsMatt Arsenault2017-03-241-0/+269
* Revert r298620: [LV] Vectorize GEPsIvan Krasin2017-03-243-104/+107
* [asan] Delay creation of asan ctor.Evgeniy Stepanov2017-03-241-2/+2
* AMDGPU: Implement f16 froundMatt Arsenault2017-03-242-21/+74
* AMDGPU: Unify divergent function exits.Matt Arsenault2017-03-246-44/+952
* Make testcase less nonsensical while still exercising the same code paths.Adrian Prantl2017-03-241-20/+24
* AMDGPU: Fold rcp/rsq of undef to undefMatt Arsenault2017-03-241-0/+18
* [AMDGPU] Fold V_CNDMASK with identical source operandsStanislav Mekhanoshin2017-03-241-0/+34
* [AMDGPU] Rename Kind to ValueKind in metadata to be consistentKonstantin Zhuravlyov2017-03-243-184/+184
* [AMDGPU] Add AMDGPUAliasAnalysis to opt pipelineStanislav Mekhanoshin2017-03-241-0/+8
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