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* [yaml2obj][ELF] Add an optional `Size` field to the YAML section declaration.Simon Atanasyan2014-05-162-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the only method to configure ELF section's content and size is to assign a hexadecimal string to the `Content` field. Unfortunately this way is completely useless when you need to declare a really large section. To solve this problem this patch adds one more optional field `Size` to the `RawContentSection` structure. When yaml2obj generates an ELF file it uses the following algorithm: 1. If both `Content` and `Size` fields are missed create an empty section. 2. If only `Content` field is missed take section length from the `Size` field and fill the section by zero. 3. If only `Size` field is missed create a section using data from the `Content` field. 4. If both `Content` and `Size` fields are provided validate that the `Size` value is not less than size of `Content` data. Than take section length from the `Size`, fill beginning of the section by `Content` and the rest by zero. Examples -------- * Create a section 0x10000 bytes long filled by zero Name: .data Type: SHT_PROGBITS Flags: [ SHF_ALLOC ] Size: 0x10000 * Create a section 0x10000 bytes long starting from 'CA' 'FE' 'BA' 'BE' Name: .data Type: SHT_PROGBITS Flags: [ SHF_ALLOC ] Content: CAFEBABE Size: 0x10000 The patch reviewed by Michael Spencer. llvm-svn: 208995
* Re-enable inline memcpy expansion for Thumb1.James Molloy2014-05-162-5/+60
| | | | | | Patch by Moritz Roth! llvm-svn: 208994
* Fix the Load/Store optimization pass to work with Thumb1.James Molloy2014-05-163-3/+48
| | | | | | Patch by Moritz Roth! llvm-svn: 208992
* [mips][mips64r6] Add SELEQZ and SELNEZ instructionsZoran Jovanovic2014-05-162-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D3743 llvm-svn: 208987
* [mips][mips64r6] Add Compact indexed jumps.Zoran Jovanovic2014-05-162-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D3707 llvm-svn: 208981
* Revert "Implement global merge optimization for global variables."Rafael Espindola2014-05-1610-295/+56
| | | | | | | | | | | | This reverts commit r208934. The patch depends on aliases to GEPs with non zero offsets. That is not supported and fairly broken. The good news is that GlobalAlias is being redesigned and will have support for offsets, so this patch should be a nice match for it. llvm-svn: 208978
* [mips][mips64r6] Add Compact zero-compare branch-and-link instructionsZoran Jovanovic2014-05-162-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D3718 llvm-svn: 208977
* [mips][mips64r6] Add compact branch instructionsZoran Jovanovic2014-05-162-0/+20
| | | | | | Differential Revision: http://reviews.llvm.org/D3691 llvm-svn: 208974
* [mips][mips64r6] Add LWPC and LWUPC instructionsZoran Jovanovic2014-05-162-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D3788 llvm-svn: 208971
* [mips][mips64r6] Add Floating Point Compare setting Mask - CMP.condn.fmtZoran Jovanovic2014-05-162-0/+64
| | | | | | Differential Revision: http://reviews.llvm.org/D3750 llvm-svn: 208970
* TableGen: fix operand counting for aliasesTim Northover2014-05-1617-141/+111
| | | | | | | | | | | | | | | | | | | | | TableGen has a fairly dubious heuristic to decide whether an alias should be printed: does the alias have lest operands than the real instruction. This is bad enough (particularly with no way to override it), but it should at least be calculated consistently for both strings. This patch implements that logic: first get the *correct* string for the variant, in the same way as the Matcher, without guessing; then count the number of whitespace chars. There are basically 4 changes this brings about after the previous commits; all of these appear to be good, so I have changed the tests: + ARM64: we print "neg X, Y" instead of "sub X, xzr, Y". + ARM64: we skip implicit "uxtx" and "uxtw" modifiers. + Sparc: we print "mov A, B" instead of "or %g0, A, B". + Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B" llvm-svn: 208969
* [ARM64]Implement NEON post-increment LD1(lane) and post-increment LD1R.Hao Liu2014-05-161-1/+485
| | | | llvm-svn: 208955
* [mips][mips64r6] Add Floating Point Fused Multiply Add SubtractZoran Jovanovic2014-05-162-0/+8
| | | | | | Differential Revision: http://reviews.llvm.org/D3727 llvm-svn: 208952
* ARM: add some integer/floating point conversion libcallsSaleem Abdulrasool2014-05-161-0/+74
| | | | | | | | Add some Windows on ARM specific library calls. These are provided by msvcrt, and can be used to perform integer to floating-point conversions (and vice-versa) mirroring similar functions in the RTABI. llvm-svn: 208949
* ProfileData: Allow multiple profiles in RawInstrProfReaderJustin Bogner2014-05-161-0/+64
| | | | | | | | | | | | | | | | | | | Allow multiple raw profiles to coexist in a single .profraw file, given the following conditions: - Zero padding at the end of or between profiles will be skipped. - Each profile must start with a valid header. - Mixing endianness or pointer sizes in concatenated profiles files is not allowed. This is needed to handle cases where a program's shared libraries are profiled as well as the main executable itself, as we'll need to emit each executable's counters. Combining the tables in the runtime would be expensive for the instrumented program. rdar://16918688 llvm-svn: 208938
* musttail: Fix the verification of alignment attributesReid Kleckner2014-05-151-0/+7
| | | | | | | Previously this would fail with an assertion failure when trying to add an alignment attribute without a value. llvm-svn: 208935
* Implement global merge optimization for global variables.Jiangning Liu2014-05-1510-56/+295
| | | | | | | | | | | This commit implements two command line switches -global-merge-on-external and -global-merge-aligned, and both of them are false by default, so this optimization is disabled by default for all targets. For ARM64, some back-end behaviors need to be tuned to get this optimization further enabled. llvm-svn: 208934
* DebugInfo: Don't put fission type units in comdat sections.David Blaikie2014-05-151-2/+18
| | | | | | | | | Since type units in the dwo file are handled by a debug aware tool, they don't need to leverage the ELF comdat grouping to implement deduplication. Avoid creating all the .group sections for these as a space optimization. llvm-svn: 208930
* Finish materialize for intsReed Kotler2014-05-151-0/+65
| | | | | | | | | | | | | | Summary: We add code to materialize all integer literals. Test Plan: simplestorei.ll Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3596 llvm-svn: 208923
* Don't insert lifetime.end markers between a musttail call and retReid Kleckner2014-05-151-0/+36
| | | | | | | | | | | | | The allocas going out of scope are immediately killed by the return instruction. This is a resend of r208912, which was committed accidentally. Reviewers: chandlerc Differential Revision: http://reviews.llvm.org/D3792 llvm-svn: 208920
* Revert "Don't insert lifetime.end markers between a musttail call and ret"Reid Kleckner2014-05-151-36/+0
| | | | | | | | This reverts commit r208912. It was committed accidentally without review. llvm-svn: 208914
* Don't insert lifetime.end markers between a musttail call and retReid Kleckner2014-05-151-0/+36
| | | | | | | | | | | The allocas going out of scope are immediately killed by the return instruction. Reviewers: chandlerc Differential Revision: http://reviews.llvm.org/D3630 llvm-svn: 208912
* Teach the inliner how to preserve musttail invariantsReid Kleckner2014-05-151-9/+140
| | | | | | | | | | | | | | | | | | | | The interesting case is what happens when you inline a musttail call through a musttail call site. In this case, we can't break perfect forwarding or allow any stack growth. Instead of merging control flow from the inlined return instruction after a musttail call into the body of the caller, leave the inlined return instruction in the caller so that the musttail call stays in the tail position. More work is required in http://reviews.llvm.org/D3630 to handle the case where the inlined function has dynamic allocas or byval arguments. Reviewers: chandlerc Differential Revision: http://reviews.llvm.org/D3491 llvm-svn: 208910
* [obj2yaml][ELF] Print relocation's offset as a hex number. Use a properSimon Atanasyan2014-05-151-10/+10
| | | | | | types to hold relocation's offset and addend. llvm-svn: 208906
* [obj2yaml][ELF] Do not print empty Link and Info fields for ELF sections.Simon Atanasyan2014-05-151-26/+0
| | | | llvm-svn: 208905
* [ARM64] Improve diagnostics for Cn operands in SYS instructionsBradley Smith2014-05-151-1/+1
| | | | llvm-svn: 208902
* [yaml2obj] Add "-o" command line option to specify an output file name.Simon Atanasyan2014-05-152-0/+6
| | | | llvm-svn: 208900
* llvm/test/CodeGen/X86/combine-sse41-intrinsics.ll: Add explicit triple.NAKAMURA Takumi2014-05-151-1/+1
| | | | llvm-svn: 208897
* [X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.Andrea Di Biagio2014-05-153-0/+414
| | | | | | | | | | | | | Added target specific combine rules to fold blend intrinsics according to the following rules: 1) fold(blend A, A, Mask) -> A; 2) fold(blend A, B, <allZeros>) -> A; 3) fold(blend A, B, <allOnes>) -> B. Added two new tests to verify that the new folding rules work for all the optimized blend intrinsics. llvm-svn: 208895
* [mips][mips64r6] Add CLASS.fmt instructionsZoran Jovanovic2014-05-152-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D3712 llvm-svn: 208894
* [mips][mips64r6] Add RINT.fmt instructionsZoran Jovanovic2014-05-152-0/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D3711 llvm-svn: 208892
* [mips][mips64r6] Add SELEQZ/SELNEZ.fmt instructionsZoran Jovanovic2014-05-152-0/+8
| | | | | | Differential Revision: http://reviews.llvm.org/D3710 llvm-svn: 208891
* [mips][mips64r6] Add MAX/MIN/MAXA/MINA.fmt instructionsZoran Jovanovic2014-05-152-0/+16
| | | | | | Differential Revision: http://reviews.llvm.org/D3709 llvm-svn: 208890
* R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0Tom Stellard2014-05-151-0/+25
| | | | llvm-svn: 208886
* R600/SI: Use VALU instructions for i1 opsTom Stellard2014-05-152-12/+36
| | | | llvm-svn: 208885
* [mips][mips64r6] Add bitswap, and dbitswapDaniel Sanders2014-05-152-0/+3
| | | | | | | | | | | | Summary: Depends on D3728 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3729 llvm-svn: 208877
* ARM64: print correct aliases for NEON mov & mvn instructionsTim Northover2014-05-1510-138/+138
| | | | | | | | In all cases, if a "mov" alias exists, it is the canonical form of the instruction. Now that TableGen can support aliases containing syntax variants, we can enable them and improve the quality of the asm output. llvm-svn: 208874
* [mips][mips64r6] Add align and dalignDaniel Sanders2014-05-152-0/+3
| | | | | | | | | | | | Summary: Depends on D3689 Reviewers: vmedic, zoran.jovanovic, jkolek Reviewed By: jkolek Differential Revision: http://reviews.llvm.org/D3728 llvm-svn: 208872
* TableGen/ARM64: print aliases even if they have syntax variants.Tim Northover2014-05-1510-57/+54
| | | | | | | To get at least one use of the change (and some actual tests) in with its commit, I've enabled the AArch64 & ARM64 NEON mov aliases. llvm-svn: 208867
* [ARM64] Improve load/store diagnostics and forbid 32-bit register addressesBradley Smith2014-05-151-4/+4
| | | | llvm-svn: 208864
* [ARM64] Add/Fixup diagnostics for floating point immediatesBradley Smith2014-05-151-5/+5
| | | | llvm-svn: 208862
* [mips][mips64r6] Add addiupc, aluipc, and auipcDaniel Sanders2014-05-152-2/+8
| | | | | | | | | | | | | | | | Summary: No support for symbols in place of the immediate yet since it requires new relocations. Depends on D3671 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3689 llvm-svn: 208858
* [mips][mips64r6] Add aui, daui, dahi, and datiDaniel Sanders2014-05-152-0/+5
| | | | | | | | | | | | Summary: Depends on D3671 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3759 llvm-svn: 208857
* Teach the constant folder to look through bitcast constant expressionsChandler Carruth2014-05-151-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | much more effectively when trying to constant fold a load of a constant. Previously, we only handled bitcasts by trying to find a totally generic byte representation of the constant and use that. Now, we look through the bitcast to see what constant we might fold the load into, and then try to form a constant expression cast of the found value that would be equivalent to loading the value. You might wonder why on earth this actually matters. Well, turns out that the Itanium ABI causes us to create a single array for a vtable where the first elements are virtual base offsets, followed by the virtual function pointers. Because the array is homogenous the element type is consistently i8* and we inttoptr the virtual base offsets into the initial elements. Then constructors bitcast these pointers to i64 pointers prior to loading them. Boom, no more constant folding of virtual base offsets. This is the first fix to LLVM to address the *insane* performance Eric Niebler discovered with Clang on his range comprehensions[1]. There is more to come though, this doesn't *really* fix the problem fully. [1]: http://ericniebler.com/2014/04/27/range-comprehensions/ llvm-svn: 208856
* [mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.Daniel Sanders2014-05-152-0/+36
| | | | | | | | | | | | | | | Summary: They aren't implemented for any ISA at the moment. Depends on D3670 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3671 llvm-svn: 208855
* Reverting r208848, reason: build failure: ↵Dinesh Dwivedi2014-05-151-54/+0
| | | | | | sanitizer-x86_64-linux-bootstrap/builds/3399 llvm-svn: 208852
* Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'Dinesh Dwivedi2014-05-151-0/+48
| | | | | | | | | MIN(MIN(A, 23), 97) -> MIN(A, 23) MAX(MAX(A, 97), 23) -> MAX(A, 97) Differential Revision: http://reviews.llvm.org/D3629 llvm-svn: 208849
* Added inst combine transforms for single bit tests from Chris's noteDinesh Dwivedi2014-05-151-0/+54
| | | | | | | | | | | | | | | if ((x & C) == 0) x |= C becomes x |= C if ((x & C) != 0) x ^= C becomes x &= ~C if ((x & C) == 0) x ^= C becomes x |= C if ((x & C) != 0) x &= ~C becomes x &= ~C if ((x & C) == 0) x &= ~C becomes nothing Z3 Verifications code for above transform http://rise4fun.com/Z3/Pmsh Differential Revision: http://reviews.llvm.org/D3717 llvm-svn: 208848
* Fix typosAlp Toker2014-05-151-5/+5
| | | | llvm-svn: 208839
* [ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out ↵Jiangning Liu2014-05-153-4/+176
| | | | | | argument stack from callee. llvm-svn: 208837
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