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authorDaniel Sanders <daniel.sanders@imgtec.com>2014-05-15 09:47:43 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2014-05-15 09:47:43 +0000
commit19627f470b5307b5f23eb7d1b28c7416501c55b0 (patch)
tree9e771b2ae37dbcc04e23d8d8907a24b45006ef29 /llvm/test
parent8bf36cae283ddb7c61461c616268454e688f8f0e (diff)
downloadbcm5719-llvm-19627f470b5307b5f23eb7d1b28c7416501c55b0.tar.gz
bcm5719-llvm-19627f470b5307b5f23eb7d1b28c7416501c55b0.zip
[mips][mips64r6] Test that branch likelies are not accepted on MIPS64r6.
Summary: They aren't implemented for any ISA at the moment. Depends on D3670 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3671 llvm-svn: 208855
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s20
-rw-r--r--llvm/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s16
2 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s b/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s
new file mode 100644
index 00000000000..b799c8e3fcd
--- /dev/null
+++ b/llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s
@@ -0,0 +1,20 @@
+# Instructions that are invalid and are correctly rejected but use the wrong
+# error message at the moment.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
+# RUN: 2>%t1
+# RUN: FileCheck %s < %t1
+
+ .set noat
+ beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
diff --git a/llvm/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s b/llvm/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s
new file mode 100644
index 00000000000..e416a20ca1b
--- /dev/null
+++ b/llvm/test/MC/Mips/mips32r6/invalid-mips32-wrong-error.s
@@ -0,0 +1,16 @@
+# Instructions that are invalid and are correctly rejected but use the wrong
+# error message at the moment.
+#
+# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
+# RUN: 2>%t1
+# RUN: FileCheck %s < %t1
+
+ .set noat
+ bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc1fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc2tl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc2fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
+ bc2fl $fcc1,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
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