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* [ValueTracking, InstCombine] extend isKnownToBeAPowerOfTwo() to handle ↵Sanjay Patel2016-05-223-10/+4
| | | | | | | | | | | | | | vector splat constants We could try harder to handle non-splat vector constants too, but that seems much rarer to me. Note that the div test isn't resolved because there's a check for isIntegerTy() guarding that transform. Differential Revision: http://reviews.llvm.org/D20497 llvm-svn: 270369
* [AVX512] Implement missing patterns for any_extend load lowering.Igor Breger2016-05-221-0/+70
| | | | | | Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
* [AVX512] Add an AddedComplexity line to the 512-bit insert_subvector undef ↵Craig Topper2016-05-221-14/+14
| | | | | | index 0 patterns. This gives them higher priority than the memory patterns. This matches AVX1/2. llvm-svn: 270355
* [X86] Add a common check-prefix to both run lines on a test so identical ↵Craig Topper2016-05-221-361/+168
| | | | | | checks appear just once. llvm-svn: 270345
* [AVX512] Add a couple patterns to fix some cases where two vector mask ↵Craig Topper2016-05-221-12/+4
| | | | | | inversions could appear in a row. llvm-svn: 270344
* [profile] Static counter allocation for value profiling (part-1)Xinliang David Li2016-05-211-0/+31
| | | | | | Differential Revision: http://reviews.llvm.org/D20459 llvm-svn: 270336
* [AVX512] Add patterns for extracting subvectors and storing to memory.Craig Topper2016-05-212-6/+84
| | | | llvm-svn: 270334
* [Clang][AVX512][intrinsics] Fix rcp and sqrt intrinsics.Michael Zuckerman2016-05-212-20/+42
| | | | | | Differential Revision: http://reviews.llvm.org/D20438 llvm-svn: 270322
* [Clang][AVX512][intrinsics] Fix vscalef intrinsics.Michael Zuckerman2016-05-213-35/+26
| | | | | | Differential Revision: http://reviews.llvm.org/D20324 llvm-svn: 270321
* [llvm-readobj] - Teach readobj to recognize SHF_COMPRESSED flag.George Rimar2016-05-212-0/+9
| | | | | | | | | | | | | | | | | | | | | | | Main problem here was that SHF_COMPRESSED has the same value with XCORE_SHF_CP_SECTION, which was included as standart (common) flag. As far I understand xCore is a family of controllers and it that means it's constant should be processed separately, only if e_machine == EM_XCORE, otherwise llvm-readobj would output different constants twice for compressed section: Flags [ .. SHF_COMPRESSED (0x800) .. XCORE_SHF_CP_SECTION (0x800) .. ] what probably does not make sence if you're not working with xcore file. Differential revision: http://reviews.llvm.org/D20273 llvm-svn: 270320
* [AVX512] Add patterns for VEXTRACT v16i16->v8i16 and v32i8->v16i8. Disable ↵Craig Topper2016-05-214-19/+25
| | | | | | AVX2 versions of vector extract when AVX512VL is enabled. llvm-svn: 270318
* [AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when ↵Craig Topper2016-05-211-4/+4
| | | | | | AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones. llvm-svn: 270317
* [AVX512] Disable AVX/AVX2 VBROADCASTSS/VBROADCASTSD patterns when AVX512VL ↵Craig Topper2016-05-211-3/+3
| | | | | | is enabled. llvm-svn: 270316
* [AVX512] Use update_llc_test_checks to update some tests so we can see all ↵Craig Topper2016-05-213-4415/+7909
| | | | | | the instruction encodings and ensure everything is with EVEX. llvm-svn: 270315
* [SimplifyCFG] Remove cleanuppads which are empty except for calls to ↵David Majnemer2016-05-211-0/+31
| | | | | | | | | | | | | lifetime.end A cleanuppad is not cheap, they turn into many instructions and result in additional spills and fills. It is not worth keeping a cleanuppad around if all it does is hold a lifetime.end instruction. N.B. We first try to merge the cleanuppad with another cleanuppad to avoid dropping the lifetime and debug info markers. llvm-svn: 270314
* [AVX512] Fix test cases I missed in r270311.Craig Topper2016-05-211-4/+4
| | | | llvm-svn: 270313
* AMDGPU: Define priorities for register classesMatt Arsenault2016-05-219-40/+43
| | | | | | | | | | Allocating larger register classes first should give better allocation results (and more importantly for myself, make the lit tests more stable with respect to scheduler changes). Patch by Matthias Braun llvm-svn: 270312
* AMDGPU: Cleanup lowering actionsMatt Arsenault2016-05-212-32/+131
| | | | | | | | These are kind of a mess and hard to follow, particularly for loads and stores. Fix various redundant, unnecessary and dead settings. llvm-svn: 270307
* [GuardWidening] Fix incorrect use of remove_ifSanjoy Das2016-05-211-0/+38
| | | | | | | | | | | I had used `std::remove_if` under the assumption that it moves the predicate matching elements to the end, but actaully the elements remaining towards the end (after the iterator returned by `std::remove_if`) are indeterminate. Fix the bug (and make the code more straightforward) by using a temporary SmallVector, and add a test case demonstrating the issue. llvm-svn: 270306
* AMDGPU: Fix high bits after division optimizationMatt Arsenault2016-05-216-41/+329
| | | | | | | This is essentially doing a 24-bit signed division with FP. We need to truncate to the N bit result. llvm-svn: 270305
* AMDGPU: Fix verifier error when spilling SGPRsMatt Arsenault2016-05-211-2/+2
| | | | | | | | | | | The current SGPR spilling test does not stress this because it is using s_buffer_load instructions to increase SGPR pressure and spill, but their output operands have the same SReg_32_XM0 constraint. This fixes an error when the SReg_32 output from most instructions is spilled. llvm-svn: 270301
* AMDGPU: Handle cbranch vccz/vccnzMatt Arsenault2016-05-213-8/+12
| | | | llvm-svn: 270297
* AMDGPU: Implement ReverseBranchConditionMatt Arsenault2016-05-211-6/+2
| | | | llvm-svn: 270296
* AMDGPU: Implement AnalyzeBranchMatt Arsenault2016-05-219-41/+84
| | | | | | Original patch by Tom Stellard llvm-svn: 270295
* [WebAssembly] Optimize away return instructions using fallthroughs.Dan Gohman2016-05-2141-49/+90
| | | | | | | | | This saves a small amount of code size, and is a first small step toward passing values on the stack across block boundaries. Differential Review: http://reviews.llvm.org/D20450 llvm-svn: 270294
* Fix constant folding of addrspacecast of nullMatt Arsenault2016-05-212-3/+50
| | | | | | | This should not be making assumptions on the value of the casted pointer. llvm-svn: 270293
* LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()Matthias Braun2016-05-201-0/+32
| | | | | | | | | | | | | | | | | | | | | We now use LiveRangeCalc::extendToUses() instead of a specially designed algorithm in constructMainRangeFromSubranges(): - The original motivation for constructMainRangeFromSubranges() were differences between the main liverange and subranges because of hidden dead definitions. This case however cannot happen anymore with the DetectDeadLaneMasks pass in place. - It simplifies the code. - This fixes a longstanding bug where we did not properly create new SSA values on merging control flow (the MachineVerifier missed most of these cases). - Move constructMainRangeFromSubranges() to LiveIntervalAnalysis and LiveRangeCalc to better match the implementation/available helper functions. This re-applies r269016. The fixes from r270290 and r270259 should avoid the machine verifier problems this time. llvm-svn: 270291
* MachineVerifier: subregs so not require defs/valnos on every pathMatthias Braun2016-05-201-0/+26
| | | | | | | | | | | It is fine for subregister ranges to be undefined on some CFG paths as we may have a "vregX:other_subreg<read-undef> =" def on that path. We do not (and should not) have live segments for the subregister ranges. The MachineVerifier should not complain about this. This is a slight variant of http://llvm.org/PR27705 llvm-svn: 270290
* [PowerPC] Add a testcase for TCO on string rvo functionTim Shen2016-05-201-0/+44
| | | | | | Differential Revision: http://reviews.llvm.org/D20311 llvm-svn: 270287
* add test vector sdivSanjay Patel2016-05-201-0/+15
| | | | llvm-svn: 270285
* add test for vector shiftSanjay Patel2016-05-201-0/+13
| | | | llvm-svn: 270284
* [lanai] Change reloc to use PIC_ by default and cleanup.Jacques Pienaar2016-05-201-8/+3
| | | | | | | * Change reloc to PIC_; * Cleanup (clang-format & modify test); llvm-svn: 270282
* add tests for vector uremSanjay Patel2016-05-201-1/+23
| | | | llvm-svn: 270271
* dsymutil/modules: Reword the warning for static libraries without module cachesAdrian Prantl2016-05-207-26/+53
| | | | | | | | | | | | In addition to clarifying the warning message this contains a minor functional change in that it now warns if the *immediate* parent directory in which the missing PCM is expected to be isn't found. This patch also includes a more comprehensive testcase. rdar://problem/25860711 llvm-svn: 270269
* use FileCheck instead of grep for exact checkingSanjay Patel2016-05-201-5/+10
| | | | llvm-svn: 270265
* pdbdump: print out symbol names referred by publics stream.Rui Ueyama2016-05-201-0/+1
| | | | | | | | | | | | | | | | | | DBI stream contains a stream number of the symbol record stream. Symbol record streams is an array of length-type-value members. Each member represents one symbol. Publics stream contains offsets to the symbol record stream. This patch is to print out all symbols that are referenced by the publics stream. Note that even with this patch, llvm-pdbdump cannot dump all the information in a publics stream since it contains more information than symbol names. I'll improve it in followup patches. Differential Revision: http://reviews.llvm.org/D20480 llvm-svn: 270262
* LiveIntervalAnalysis: Fix missing defs in renameDisconnectedComponents().Matthias Braun2016-05-201-0/+33
| | | | | | | | | | | | | | Fix renameDisconnectedComponents() creating vreg uses that can be reached from function begin withouthaving a definition (or explicit live-in). Fix this by inserting IMPLICIT_DEF instruction before control-flow joins as necessary. Removes an assert from MachineScheduler because we may now get additional IMPLICIT_DEF when preparing the scheduling policy. This fixes the underlying problem of http://llvm.org/PR27705 llvm-svn: 270259
* [AArch64] Disable narrow load merge by defaultJun Bum Lim2016-05-201-3/+3
| | | | | | | | | | | | | | Summary: As this optimization converts two loads into one load with two shift instructions, it could potentially hurt performance if a loop is arithmetic operation intensive. Reviewers: t.p.northover, mcrosier, jmolloy Subscribers: evandro, jmolloy, aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D20172 llvm-svn: 270251
* Functions with differing phis should not be merged.Mark Lacey2016-05-201-0/+50
| | | | | | | | | | | Check that the incoming blocks of phi nodes are identical, and block function merging if they are not. rdar://problem/26255167 Differential Revision: http://reviews.llvm.org/D20462 llvm-svn: 270250
* [MachOYAML] Removing duplicated field from LC_UUID YAMLChris Bieneman2016-05-202-3/+0
| | | | | | The uuid_command was duplicating the load_command.cmdsize field. This removes the duplicate from the YAML mapping and from the test cases. llvm-svn: 270248
* [obj2yaml][yaml2obj] Adding enumFallback for MachO load commandsChris Bieneman2016-05-201-0/+51
| | | | | | | | This adds support for handling unknown load commands, and a bogus_load_command tests. Unknown or unsupported load commands can be specified in YAML by their hex value. llvm-svn: 270239
* [X86][AVX] Generalized matching for target shuffle combinesSimon Pilgrim2016-05-202-34/+15
| | | | | | | | | | | | This patch is a first step towards a more extendible method of matching combined target shuffle masks. Initially this just pulls out the existing basic mask matches and adds support for some 256/512 bit equivalents. Future patterns will require a number of features to be added but I wanted to keep this patch simple. I hope we can avoid duplication between shuffle lowering and combining and share more complex pattern match functions in future commits. Differential Revision: http://reviews.llvm.org/D19198 llvm-svn: 270230
* [X86][AVX] Sync with clang/test/CodeGen/avx-builtins.cSimon Pilgrim2016-05-201-211/+3303
| | | | llvm-svn: 270229
* [SimplifyCFG] eliminate switch cases based on known range of switch conditionSanjay Patel2016-05-201-4/+0
| | | | | | | | | | | | This was noted in PR24766: https://llvm.org/bugs/show_bug.cgi?id=24766#c2 We may not know whether the sign bit(s) are zero or one, but we can still optimize based on knowing that the sign bit is repeated. Differential Revision: http://reviews.llvm.org/D20275 llvm-svn: 270222
* [MCExpr] avoid UB via negation of INT_MINSanjay Patel2016-05-201-3/+3
| | | | | | | | | I accidentally exposed a bug in MCExpr::evaluateAsRelocatableImpl() with the test file added in: http://reviews.llvm.org/rL269977 Differential Revision: http://reviews.llvm.org/D20434 llvm-svn: 270218
* [Hexagon] Use pipe instead of temporary files in testsKrzysztof Parzyszek2016-05-203-6/+6
| | | | llvm-svn: 270217
* Refactor X86 symbol access classification.Rafael Espindola2016-05-201-1/+2
| | | | | | | | | | | | This refactors the logic in X86 to avoid code duplication. It also splits it in two steps: it first decides if a symbol is local to the DSO and then uses that information to decide how to access it. The first part is implemented by shouldAssumeDSOLocal. It is not in any way specific to X86. In a followup patch I intend to move it to somewhere common and reused it in other backends. llvm-svn: 270209
* Simplify handling of hidden stubs on PowerPC.Rafael Espindola2016-05-201-5/+3
| | | | | | | We now handle them just like non hidden ones. This was already the case on x86 (r207518) and arm (r207517). llvm-svn: 270205
* [Coverage] Fix an issue where improper coverage mapping data could be loaded ↵Igor Kudrin2016-05-204-0/+54
| | | | | | | | | | | | | | for an inline function. If an inline function is observed but unused in a translation unit, dummy coverage mapping data with zero hash is stored for this function. If such a coverage mapping section came earlier than real one, the latter was ignored. As a result, llvm-cov was unable to show coverage information for those functions. Differential Revision: http://reviews.llvm.org/D20286 llvm-svn: 270194
* [Sparc] Enable more inline assembly constraints.Chris Dewhurst2016-05-201-0/+12
| | | | | | | | Note: This is specifically to allow GCC's test pr44707 to pass. Trivial change, not put for differential revision. Test included. llvm-svn: 270192
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