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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-05-21 00:29:40 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-05-21 00:29:40 +0000 |
| commit | 4945905f5f6f15fe988e96de4c6085ca7dde874b (patch) | |
| tree | b46624f3b0d7e1e89ea5d8829d494b6a67a31a33 /llvm/test | |
| parent | 72fcd5f597cd2cad167f92b6d74056ed8e4cdb99 (diff) | |
| download | bcm5719-llvm-4945905f5f6f15fe988e96de4c6085ca7dde874b.tar.gz bcm5719-llvm-4945905f5f6f15fe988e96de4c6085ca7dde874b.zip | |
AMDGPU: Handle cbranch vccz/vccnz
llvm-svn: 270297
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/valu-i1.ll | 3 |
3 files changed, 12 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll b/llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll index 2da35ef01ca..0c734c6d99d 100644 --- a/llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll +++ b/llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll @@ -12,8 +12,7 @@ ; GCN: ds_read_b32 ; GCN: buffer_store_dword -; GCN: s_cbranch_vccnz BB0_3 -; GCN: s_branch BB0_2 +; GCN: s_cbranch_vccz BB0_2 ; GCN: BB0_3: ; GCN-NEXT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll b/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll index 4cefaedbce4..9f2f0d67d24 100644 --- a/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll +++ b/llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll @@ -1,10 +1,16 @@ -;RUN: llc -march=amdgcn -mcpu=verde < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=verde < %s | FileCheck %s ; Test a simple uniform loop that lives inside non-uniform control flow. -;CHECK-LABEL: {{^}}test1: -;CHECK: s_cbranch_execz -;CHECK: %loop_body +; CHECK-LABEL: {{^}}test1: +; CHECK: v_cmp_ne_i32_e32 vcc, 0 +; CHECK: s_and_saveexec_b64 + +; CHECK: [[LOOP_BODY_LABEL:BB[0-9]+_[0-9]+]]: +; CHECK: s_and_b64 vcc, exec, vcc +; CHECK: s_cbranch_vccz [[LOOP_BODY_LABEL]] + +; CHECK: s_endpgm define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <2 x i32> %addr.base, i32 %y, i32 %p) { main_body: %cc = icmp eq i32 %p, 0 diff --git a/llvm/test/CodeGen/AMDGPU/valu-i1.ll b/llvm/test/CodeGen/AMDGPU/valu-i1.ll index 42e69dce693..02a1278f76c 100644 --- a/llvm/test/CodeGen/AMDGPU/valu-i1.ll +++ b/llvm/test/CodeGen/AMDGPU/valu-i1.ll @@ -81,8 +81,7 @@ exit: ; SI-DAG: buffer_store_dword ; SI-DAG: v_cmp_eq_i32_e32 vcc, ; SI-DAG: s_and_b64 vcc, exec, vcc -; SI: s_cbranch_vccnz [[LABEL_EXIT]] -; SI: s_branch [[LABEL_LOOP]] +; SI: s_cbranch_vccz [[LABEL_LOOP]] ; SI: [[LABEL_EXIT]]: ; SI: s_endpgm |
