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* Add support for movntil/movntiq mnemonics. Reported on llvmdev.Eli Friedman2011-06-232-12/+24
| | | | llvm-svn: 133759
* PR10180: Fix a instcombine crash with FP vectors.Eli Friedman2011-06-231-0/+12
| | | | llvm-svn: 133756
* PTX: Always use registers for return values, but use .param space for deviceJustin Holewinski2011-06-2320-295/+318
| | | | | | | | | | | parameters if SM >= 2.0 - Update test cases to be more robust against register allocation changes - Bump up the number of registers to 128 per type - Include Python script to re-generate register file with any number of registers llvm-svn: 133736
* PTX: Fixup test cases for device param changesJustin Holewinski2011-06-232-2/+2
| | | | llvm-svn: 133735
* cmake+lit: final cleanup related to the recent churnAndrew Trick2011-06-231-7/+2
| | | | llvm-svn: 133729
* cmake+lit: handle ENABLE_ASSERTIONS feature properly.Andrew Trick2011-06-233-2/+8
| | | | llvm-svn: 133725
* lit support for REQUIRES: asserts.Andrew Trick2011-06-224-3/+12
| | | | | | | | | | Take #2. Don't piggyback on the existing config.build_mode. Instead, define a new lit feature for each build feature we need (currently just "asserts"). Teach both autoconf'd and cmake'd Makefiles to define this feature within test/lit.site.cfg. This doesn't require any lit harness changes and should be more robust across build systems. llvm-svn: 133664
* Reenable tail duplication of bb with just an unconditional jump, butRafael Espindola2011-06-221-0/+28
| | | | | | don't remove blocks that have their address taken. llvm-svn: 133659
* test/Unit: Fix enable shared test to follow check that we have actually loadedDaniel Dunbar2011-06-221-8/+8
| | | | | | the site config. llvm-svn: 133641
* Needs a triple.Nick Lewycky2011-06-221-1/+1
| | | | llvm-svn: 133634
* Emit trailing padding on constant vectors when TargetData says that the vectorNick Lewycky2011-06-221-0/+13
| | | | | | is larger than the sum of the elements (including per-element padding). llvm-svn: 133631
* Only do config-time substitution of LLVM_BUILD_MODE inAndrew Trick2011-06-221-2/+7
| | | | | | test/lit.site.cfg, not Unit/test/lit.site.cfg. llvm-svn: 133608
* PTX: Add signed integer comparisonsJustin Holewinski2011-06-221-0/+72
| | | | llvm-svn: 133599
* PTX: Add .address_size directive if PTX version >= 2.3Justin Holewinski2011-06-221-0/+2
| | | | | | Patch by Wei-Ren Chen llvm-svn: 133589
* Test case for r133560.Devang Patel2011-06-221-0/+245
| | | | llvm-svn: 133585
* Add support for assembling "movq" when it's correct to do so, while continuingNick Lewycky2011-06-211-0/+8
| | | | | | | to emit "movd" across the board to continue supporting a Darwin assembler bug. This is the reincarnation of r133452. llvm-svn: 133565
* Revert r133452: "Emit movq for 64-bit register to XMM register moves..."Bob Wilson2011-06-218-36/+10
| | | | | | | This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using the integrated assembler. llvm-svn: 133524
* Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the ↵Anna Zaks2011-06-211-0/+35
| | | | | | CBackend by emitting definitions for each intrinsic that occurs in the module. llvm-svn: 133522
* Add a reduced test case for the buildbot failure (clang self-hostedJay Foad2011-06-211-0/+182
| | | | | | build) caused by r133435. llvm-svn: 133509
* Teach dag combine to match halfword byteswap patterns.Evan Cheng2011-06-212-3/+75
| | | | | | | | | | | | | | 1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8) => (bswap x) >> 16 2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8)) => (rotl (bswap x) 16) This allows us to eliminate most of the def : Pat patterns for ARM rev16 revsh instructions. It catches many more cases for ARM and x86. rdar://9609108 llvm-svn: 133503
* indvars -disable-iv-rewrite: Adds support for eliminating identityAndrew Trick2011-06-211-0/+1
| | | | | | | | | | | | | | | | | | | ops. This is a rewrite of the IV simplification algorithm used by -disable-iv-rewrite. To avoid perturbing the default mode, I temporarily split the driver and created SimplifyIVUsersNoRewrite. The idea is to avoid doing opcode/pattern matching inside IndVarSimplify. SCEV already does it. We want to optimize with the full generality of SCEV, but optimize def-use chains top down on-demand rather than rewriting the entire expression bottom-up. This was easy to do for operations that SCEV can prove are identity function. So we're now eliminating bitmasks and zero extends this way. A result of this rewrite is that indvars -disable-iv-rewrite no longer requires IVUsers. llvm-svn: 133502
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-212-6/+98
| | | | llvm-svn: 133494
* PTX: Fix conversion between predicates and value typesJustin Holewinski2011-06-202-54/+64
| | | | llvm-svn: 133454
* Emit movq for 64-bit register to XMM register moves, but continue to acceptNick Lewycky2011-06-208-10/+36
| | | | | | movd when assembling. llvm-svn: 133452
* Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflowRoman Divacky2011-06-201-0/+29
| | | | | | with 32bit values. llvm-svn: 133439
* This is an automatically reduced test case that crashed in GVN, at someJay Foad2011-06-201-0/+106
| | | | | | point during the development of the phi operand changes. llvm-svn: 133436
* Fix PromoteIntRes_TRUNCATE: Add support for cases where theNadav Rotem2011-06-201-0/+11
| | | | | | | source vector type is to be split while the target vector is to be promoted. (eg: <4 x i64> -> <4 x i8> ) llvm-svn: 133424
* Update test.Benjamin Kramer2011-06-191-27/+27
| | | | llvm-svn: 133390
* Reduce the runtime of the test. Keep only the interesting cases.Nadav Rotem2011-06-191-1077/+0
| | | | llvm-svn: 133381
* Remove support for parsing the "type i32" syntax for defining a numberedChris Lattner2011-06-1929-319/+81
| | | | | | | top level type without a specified number. This syntax isn't documented and blocks forward progress. llvm-svn: 133371
* remove an unreduced testcase.Chris Lattner2011-06-181-282/+0
| | | | llvm-svn: 133356
* MC: Allow .common as alias for .comm assembler directive. PR10116.Hans Wennborg2011-06-181-0/+2
| | | | llvm-svn: 133349
* Fix PR10103: Less code for enum type translation.Hans Wennborg2011-06-182-1/+37
| | | | | | | | | | | In cases such as the attached test, where the case value for a switch destination is used in a phi node that follows the destination, it might be better to replace that value with the condition value of the switch, so that more blocks can be folded away with TryToSimplifyUncondBranchFromEmptyBlock because there are less conflicts in the phi node. llvm-svn: 133344
* Add test for r133251.Nick Lewycky2011-06-181-0/+26
| | | | llvm-svn: 133339
* When scalar replacement returns a vector type, only accept it if the vectorCameron Zwarich2011-06-182-2/+19
| | | | | | | | | | | | type's bitwidth matches the (allocated) size of the alloca. This severely pessimizes vector scalar replacement when the only vector type being used is something like <3 x float> on x86 or ARM whose allocated size matches a <4 x float>. I hope to fix some of the flawed assumptions about allocated size throughout scalar replacement and reenable this in most cases. llvm-svn: 133338
* rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which isChris Lattner2011-06-1884-3058/+1367
| | | | | | | | | for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the target indep prefetch change. As usual, updating the testsuite is a PITA. llvm-svn: 133337
* Fix an invalid bitcast crash that occurs when doing a partial memset of a vectorCameron Zwarich2011-06-181-0/+22
| | | | | | alloca. Fixes part of <rdar://problem/9580800>. llvm-svn: 133336
* Switch ARM to using AltOrders instead of MethodBodies.Jakob Stoklund Olesen2011-06-181-1/+1
| | | | | | | | | This slightly changes the GPR allocation order on Darwin where R9 is not a callee-saved register: Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11 After: %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11 llvm-svn: 133326
* Moved to the right place.Galina Kistanova2011-06-182-0/+5
| | | | llvm-svn: 133324
* Fix UMULO support for 2x register width to allow the fullEric Christopher2011-06-181-2/+45
| | | | | | | | | range without a libcall to a new mulo<mode> libcall that we'd have to create. Finishes the rest of rdar://9090077 and rdar://9210061 llvm-svn: 133318
* Fix a bug in the type-lowering of integer-promoted elements. Add a check thatNadav Rotem2011-06-171-0/+1468
| | | | | | | the newly created simple type is valid before checking its legality. Re-commit the test file. llvm-svn: 133291
* Add an alternative rev16 pattern. We should figure out a better way to ↵Evan Cheng2011-06-171-0/+17
| | | | | | handle these complex rev patterns. rdar://9609108 llvm-svn: 133289
* Lower multiply with overflow checking to __mulo<mode>Eric Christopher2011-06-171-0/+38
| | | | | | | | | calls if we haven't been able to lower them any other way. Fixes rdar://9090077 and rdar://9210061 llvm-svn: 133288
* est 2008-06-04-indirectmem.ll is X86-specific. Move to X86 folder.Galina Kistanova2011-06-171-0/+0
| | | | llvm-svn: 133275
* remove support for a bunch of obsolete instruction encodingsChris Lattner2011-06-1718-237/+0
| | | | | | and other backward compatibility hacks. llvm-svn: 133273
* Stop accepting and ignoring attributes in function types. Attributes are ↵Chris Lattner2011-06-176-26/+7
| | | | | | | | applied to functions and call/invokes, not to types. llvm-svn: 133266
* Fix a few places where 32bit instructions/registerset were used on PPC64.Roman Divacky2011-06-171-0/+14
| | | | llvm-svn: 133260
* Test for previous commit.Rafael Espindola2011-06-171-0/+85
| | | | llvm-svn: 133256
* PTX: Adjust rounding modesJustin Holewinski2011-06-176-22/+22
| | | | | | | | | | | | | | | * rounding modes for fp add, mul, sub now use .rn * float -> int rounding correctly uses .rzi not .rni * 32bit fdiv for sm13 uses div.rn (instead of div.approx) * 32bit fdiv for sm10 now uses div (instead of div.approx) Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit. All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend. Patch by Dan Bailey llvm-svn: 133253
* make the asmparser reject function and type redefinitions. 'Merging' hasn't ↵Chris Lattner2011-06-1723-99/+0
| | | | | | | | been needed since llvm-gcc 3.4 days. llvm-svn: 133248
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