PTX: Adjust rounding modes

* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)

Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.

All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.

Patch by Dan Bailey

llvm-svn: 133253

6 files changed, 22 insertions, 22 deletions

diff --git a/llvm/test/CodeGen/PTX/add.ll b/llvm/test/CodeGen/PTX/add.ll
index b89a2f62691..c16be4933c5 100644
--- a/llvm/test/CodeGen/PTX/add.ll
+++ b/llvm/test/CodeGen/PTX/add.ll
@@ -22,14 +22,14 @@ define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
 }
 
 define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: add.f32 r0, r1, r2
+; CHECK: add.rn.f32 r0, r1, r2
 ; CHECK-NEXT: ret;
   %z = fadd float %x, %y
   ret float %z
 }
 
 define ptx_device double @t1_f64(double %x, double %y) {
-; CHECK: add.f64 rd0, rd1, rd2
+; CHECK: add.rn.f64 rd0, rd1, rd2
 ; CHECK-NEXT: ret;
   %z = fadd double %x, %y
   ret double %z
@@ -57,14 +57,14 @@ define ptx_device i64 @t2_u64(i64 %x) {
 }
 
 define ptx_device float @t2_f32(float %x) {
-; CHECK: add.f32 r0, r1, 0F3F800000;
+; CHECK: add.rn.f32 r0, r1, 0F3F800000;
 ; CHECK-NEXT: ret;
   %z = fadd float %x, 1.0
   ret float %z
 }
 
 define ptx_device double @t2_f64(double %x) {
-; CHECK: add.f64 rd0, rd1, 0D3FF0000000000000;
+; CHECK: add.rn.f64 rd0, rd1, 0D3FF0000000000000;
 ; CHECK-NEXT: ret;
   %z = fadd double %x, 1.0
   ret double %z
diff --git a/llvm/test/CodeGen/PTX/cvt.ll b/llvm/test/CodeGen/PTX/cvt.ll
index 984cb4d8d5a..bf18bd79211 100644
--- a/llvm/test/CodeGen/PTX/cvt.ll
+++ b/llvm/test/CodeGen/PTX/cvt.ll
@@ -31,7 +31,7 @@ define ptx_device i32 @cvt_pred_i64(i64 %x, i1 %y) {
 }
 
 define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) {
-; CHECK: cvt.rni.pred.f32 p0, r1;
+; CHECK: cvt.rzi.pred.f32 p0, r1;
 ; CHECK: ret;
 	%a = fptoui float %x to i1
 	%b = and i1 %a, %y
@@ -40,7 +40,7 @@ define ptx_device i32 @cvt_pred_f32(float %x, i1 %y) {
 }
 
 define ptx_device i32 @cvt_pred_f64(double %x, i1 %y) {
-; CHECK: cvt.rni.pred.f64 p0, rd1;
+; CHECK: cvt.rzi.pred.f64 p0, rd1;
 ; CHECK: ret;
 	%a = fptoui double %x to i1
 	%b = and i1 %a, %y
@@ -72,14 +72,14 @@ define ptx_device i16 @cvt_i16_i64(i64 %x) {
 }
 
 define ptx_device i16 @cvt_i16_f32(float %x) {
-; CHECK: cvt.rni.u16.f32 rh0, r1;
+; CHECK: cvt.rzi.u16.f32 rh0, r1;
 ; CHECK: ret;
 	%a = fptoui float %x to i16
 	ret i16 %a
 }
 
 define ptx_device i16 @cvt_i16_f64(double %x) {
-; CHECK: cvt.rni.u16.f64 rh0, rd1;
+; CHECK: cvt.rzi.u16.f64 rh0, rd1;
 ; CHECK: ret;
 	%a = fptoui double %x to i16
 	ret i16 %a
@@ -109,14 +109,14 @@ define ptx_device i32 @cvt_i32_i64(i64 %x) {
 }
 
 define ptx_device i32 @cvt_i32_f32(float %x) {
-; CHECK: cvt.rni.u32.f32 r0, r1;
+; CHECK: cvt.rzi.u32.f32 r0, r1;
 ; CHECK: ret;
 	%a = fptoui float %x to i32
 	ret i32 %a
 }
 
 define ptx_device i32 @cvt_i32_f64(double %x) {
-; CHECK: cvt.rni.u32.f64 r0, rd1;
+; CHECK: cvt.rzi.u32.f64 r0, rd1;
 ; CHECK: ret;
 	%a = fptoui double %x to i32
 	ret i32 %a
@@ -146,14 +146,14 @@ define ptx_device i64 @cvt_i64_i32(i32 %x) {
 }
 
 define ptx_device i64 @cvt_i64_f32(float %x) {
-; CHECK: cvt.rni.u64.f32 rd0, r1;
+; CHECK: cvt.rzi.u64.f32 rd0, r1;
 ; CHECK: ret;
 	%a = fptoui float %x to i64
 	ret i64 %a
 }
 
 define ptx_device i64 @cvt_i64_f64(double %x) {
-; CHECK: cvt.rni.u64.f64 rd0, rd1;
+; CHECK: cvt.rzi.u64.f64 rd0, rd1;
 ; CHECK: ret;
 	%a = fptoui double %x to i64
 	ret i64 %a
diff --git a/llvm/test/CodeGen/PTX/fdiv-sm10.ll b/llvm/test/CodeGen/PTX/fdiv-sm10.ll
index 9aff25111b0..eb32222f3a3 100644
--- a/llvm/test/CodeGen/PTX/fdiv-sm10.ll
+++ b/llvm/test/CodeGen/PTX/fdiv-sm10.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -march=ptx32 -mattr=+sm10 | FileCheck %s
 
 define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: div.approx.f32 r0, r1, r2;
+; CHECK: div.f32 r0, r1, r2;
 ; CHECK-NEXT: ret;
 	%a = fdiv float %x, %y
 	ret float %a
diff --git a/llvm/test/CodeGen/PTX/fdiv-sm13.ll b/llvm/test/CodeGen/PTX/fdiv-sm13.ll
index 84e0adab7e1..ad24f35b206 100644
--- a/llvm/test/CodeGen/PTX/fdiv-sm13.ll
+++ b/llvm/test/CodeGen/PTX/fdiv-sm13.ll
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -march=ptx32 -mattr=+sm13 | FileCheck %s
 
 define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: div.approx.f32 r0, r1, r2;
+; CHECK: div.rn.f32 r0, r1, r2;
 ; CHECK-NEXT: ret;
 	%a = fdiv float %x, %y
 	ret float %a
diff --git a/llvm/test/CodeGen/PTX/mul.ll b/llvm/test/CodeGen/PTX/mul.ll
index 93f94e35096..2093556dac4 100644
--- a/llvm/test/CodeGen/PTX/mul.ll
+++ b/llvm/test/CodeGen/PTX/mul.ll
@@ -11,28 +11,28 @@
 ;}
 
 define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: mul.f32 r0, r1, r2
+; CHECK: mul.rn.f32 r0, r1, r2
 ; CHECK-NEXT: ret;
   %z = fmul float %x, %y
   ret float %z
 }
 
 define ptx_device double @t1_f64(double %x, double %y) {
-; CHECK: mul.f64 rd0, rd1, rd2
+; CHECK: mul.rn.f64 rd0, rd1, rd2
 ; CHECK-NEXT: ret;
   %z = fmul double %x, %y
   ret double %z
 }
 
 define ptx_device float @t2_f32(float %x) {
-; CHECK: mul.f32 r0, r1, 0F40A00000;
+; CHECK: mul.rn.f32 r0, r1, 0F40A00000;
 ; CHECK-NEXT: ret;
   %z = fmul float %x, 5.0
   ret float %z
 }
 
 define ptx_device double @t2_f64(double %x) {
-; CHECK: mul.f64 rd0, rd1, 0D4014000000000000;
+; CHECK: mul.rn.f64 rd0, rd1, 0D4014000000000000;
 ; CHECK-NEXT: ret;
   %z = fmul double %x, 5.0
   ret double %z
diff --git a/llvm/test/CodeGen/PTX/sub.ll b/llvm/test/CodeGen/PTX/sub.ll
index 9efeaace0e7..4d552801a47 100644
--- a/llvm/test/CodeGen/PTX/sub.ll
+++ b/llvm/test/CodeGen/PTX/sub.ll
@@ -22,14 +22,14 @@ define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
 }
 
 define ptx_device float @t1_f32(float %x, float %y) {
-; CHECK: sub.f32 r0, r1, r2
+; CHECK: sub.rn.f32 r0, r1, r2
 ; CHECK-NEXT: ret;
   %z = fsub float %x, %y
   ret float %z
 }
 
 define ptx_device double @t1_f64(double %x, double %y) {
-; CHECK: sub.f64 rd0, rd1, rd2
+; CHECK: sub.rn.f64 rd0, rd1, rd2
 ; CHECK-NEXT: ret;
   %z = fsub double %x, %y
   ret double %z
@@ -57,14 +57,14 @@ define ptx_device i64 @t2_u64(i64 %x) {
 }
 
 define ptx_device float @t2_f32(float %x) {
-; CHECK: add.f32 r0, r1, 0FBF800000;
+; CHECK: add.rn.f32 r0, r1, 0FBF800000;
 ; CHECK-NEXT: ret;
   %z = fsub float %x, 1.0
   ret float %z
 }
 
 define ptx_device double @t2_f64(double %x) {
-; CHECK: add.f64 rd0, rd1, 0DBFF0000000000000;
+; CHECK: add.rn.f64 rd0, rd1, 0DBFF0000000000000;
 ; CHECK-NEXT: ret;
   %z = fsub double %x, 1.0
   ret double %z