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* [yaml2obj][ELF] Allow expressing undefined symbols.Sean Silva2013-06-211-0/+4
| | | | | | | | | | Previously we unconditionally enforced that section references in symbols in the YAML had a name that was a section name present in the object, and linked the references to that section. Now, permit empty section names (already the default, if the `Section` key is not provided) to indicate SHN_UNDEF. llvm-svn: 184513
* [yaml2obj][ELF] Don't explicitly set `Binding` with STB_*Sean Silva2013-06-212-6/+45
| | | | | | | | | | | | | | | Instead, just have 3 sub-lists, one for each of {STB_LOCAL,STB_GLOBAL,STB_WEAK}. This allows us to be a lot more explicit w.r.t. the symbol ordering in the object file, because if we allowed explicitly setting the STB_* `Binding` key for the symbol, then we might have ended up having to shuffle STB_LOCAL symbols to the front of the list, which is likely to cause confusion and potential for error. Also, this new approach is simpler ;) llvm-svn: 184506
* ARM: Remove a (false) dependency on the memoryoperand's value as we do not useQuentin Colombet2013-06-202-2/+44
| | | | | | | | | | it at the moment. This allows to form more paired loads even when stack coloring pass destroys the memoryoperand's value. <rdar://problem/13978317> llvm-svn: 184492
* Update the X86 disassembler to use xacquire and xrelease when appropriate.Kevin Enderby2013-06-201-1/+29
| | | | | | | | | | | | | | | | | This is a bit tricky as the xacquire and xrelease hints use the same bytes, 0xf2 and 0xf3, as the repne and rep prefixes. Fortunately llvm has different llvm MCInst Opcode enums for rep/xrelease and repne/xacquire. So to make this work a boolean was added the InternalInstruction struct as part of the Prefix state which is set with the added logic in readPrefixes() when decoding an instruction to determine if these prefix bytes are to be disassembled as xacquire or xrelease. Then we let the matcher pick the normal prefix instructionID and we change the Opcode after that when it is set into the MCInst being created. rdar://11019859 llvm-svn: 184490
* R600/SI: Expand sub for v2i32 and v4i32 for SITom Stellard2013-06-201-6/+31
| | | | | | | | | | Also add a v2i32 test to the existing v4i32 test. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry<awatry@gmail.com> llvm-svn: 184482
* R600/SI: Expand add for v2i32 and v4i32Tom Stellard2013-06-201-6/+31
| | | | | | | | | | | Also add SI tests to existing file and a v2i32 test for both R600 and SI. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> llvm-svn: 184481
* R600: Expand v2i32 load/store instead of custom loweringTom Stellard2013-06-201-0/+6
| | | | | | | | | | | | | The custom lowering causes llc to crash with a segfault. Ideally, the custom lowering can be fixed, but this allows programs which load/store v2i32 to work without crashing. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry<awatry@gmail.com> llvm-svn: 184480
* [yaml2obj][ELF] Add support for st_value and st_size.Sean Silva2013-06-201-0/+16
| | | | | | | | | After this patch, the ELF file produced by `yaml2obj-elf-symbol-basic.yaml`, when linked and executed on x86_64 (under SysV ABI, obviously; I tested on Linux), produces a working executable that goes into an infinite loop! llvm-svn: 184469
* [yaml2obj][ELF] Allow symbols to reference sections.Sean Silva2013-06-201-0/+2
| | | | llvm-svn: 184468
* Use only the filename when deciding if a file is a duplicate.Rafael Espindola2013-06-201-0/+2
| | | | | | Matches gnu ar behavior. llvm-svn: 184448
* This reverts r155000.Joey Gouly2013-06-203-4/+6
| | | | | | | | | The cdp2 instruction should have the same restrictions as cdp on the co-processor registers. VFP instructions on v8/AArch32 share the same encoding space as cdp2. llvm-svn: 184445
* SLPVectorization: Add a basic support for cross-basic block slp vectorization.Nadav Rotem2013-06-201-0/+54
| | | | | | | We collect gather sequences when we vectorize basic blocks. Gather sequences are excellent hints for vectorization of other basic blocks. llvm-svn: 184444
* Give this X86-specific test a triple so it's actually X86-specific.David Blaikie2013-06-201-1/+1
| | | | llvm-svn: 184443
* [MC] Support @ variants with directional labelsUlrich Weigand2013-06-201-1/+7
| | | | | | | | | | | The assembler parser common code supports recognizing symbol variants using the @ modifer. On PowerPC, it should also be possible to use (some of) those modifiers with directional labels, like "1f@l". This patch adds support for accepting symbol variants on directional labels as well. llvm-svn: 184437
* [PowerPC] Optimize @ha/@l constructsUlrich Weigand2013-06-201-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for having the assembler optimize fixups to constructs like "symbol@ha" or "symbol@l" if "symbol" can be resolved at assembler time. This optimization is already present in the PPCMCExpr.cpp code for handling PPC_HA16/PPC_LO16 target expressions. However, those target expression were used only on Darwin targets. This patch changes target expression code so that they are usable also with the GNU assembler (using the @ha / @l syntax instead of the ha16() / lo16() syntax), and changes the MCInst lowering code to generate those target expressions where appropriate. It also changes the asm parser to generate HA16/LO16 target expressions when parsing assembler source that uses the @ha / @l modifiers. The effect is that now the above- mentioned optimization automatically becomes available for those situations too. llvm-svn: 184436
* [PowerPC] Support compare mnemonics with implied CR0Ulrich Weigand2013-06-201-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just like for branch mnemonics (where support was recently added), the assembler is supposed to support extended mnemonics for the compare instructions where no condition register is specified explicitly (and CR0 is assumed implicitly). This patch adds support for those extended compare mnemonics. Index: llvm-head/test/MC/PowerPC/ppc64-encoding-ext.s =================================================================== --- llvm-head.orig/test/MC/PowerPC/ppc64-encoding-ext.s +++ llvm-head/test/MC/PowerPC/ppc64-encoding-ext.s @@ -449,21 +449,37 @@ # CHECK: cmpdi 2, 3, 128 # encoding: [0x2d,0x23,0x00,0x80] cmpdi 2, 3, 128 +# CHECK: cmpdi 0, 3, 128 # encoding: [0x2c,0x23,0x00,0x80] + cmpdi 3, 128 # CHECK: cmpd 2, 3, 4 # encoding: [0x7d,0x23,0x20,0x00] cmpd 2, 3, 4 +# CHECK: cmpd 0, 3, 4 # encoding: [0x7c,0x23,0x20,0x00] + cmpd 3, 4 # CHECK: cmpldi 2, 3, 128 # encoding: [0x29,0x23,0x00,0x80] cmpldi 2, 3, 128 +# CHECK: cmpldi 0, 3, 128 # encoding: [0x28,0x23,0x00,0x80] + cmpldi 3, 128 # CHECK: cmpld 2, 3, 4 # encoding: [0x7d,0x23,0x20,0x40] cmpld 2, 3, 4 +# CHECK: cmpld 0, 3, 4 # encoding: [0x7c,0x23,0x20,0x40] + cmpld 3, 4 # CHECK: cmpwi 2, 3, 128 # encoding: [0x2d,0x03,0x00,0x80] cmpwi 2, 3, 128 +# CHECK: cmpwi 0, 3, 128 # encoding: [0x2c,0x03,0x00,0x80] + cmpwi 3, 128 # CHECK: cmpw 2, 3, 4 # encoding: [0x7d,0x03,0x20,0x00] cmpw 2, 3, 4 +# CHECK: cmpw 0, 3, 4 # encoding: [0x7c,0x03,0x20,0x00] + cmpw 3, 4 # CHECK: cmplwi 2, 3, 128 # encoding: [0x29,0x03,0x00,0x80] cmplwi 2, 3, 128 +# CHECK: cmplwi 0, 3, 128 # encoding: [0x28,0x03,0x00,0x80] + cmplwi 3, 128 # CHECK: cmplw 2, 3, 4 # encoding: [0x7d,0x03,0x20,0x40] cmplw 2, 3, 4 +# CHECK: cmplw 0, 3, 4 # encoding: [0x7c,0x03,0x20,0x40] + cmplw 3, 4 # FIXME: Trap mnemonics Index: llvm-head/lib/Target/PowerPC/PPCInstrInfo.td =================================================================== --- llvm-head.orig/lib/Target/PowerPC/PPCInstrInfo.td +++ llvm-head/lib/Target/PowerPC/PPCInstrInfo.td @@ -2201,3 +2201,12 @@ defm : BranchExtendedMnemonic<"ne", 68>; defm : BranchExtendedMnemonic<"nu", 100>; defm : BranchExtendedMnemonic<"ns", 100>; +def : InstAlias<"cmpwi $rA, $imm", (CMPWI CR0, gprc:$rA, s16imm:$imm)>; +def : InstAlias<"cmpw $rA, $rB", (CMPW CR0, gprc:$rA, gprc:$rB)>; +def : InstAlias<"cmplwi $rA, $imm", (CMPLWI CR0, gprc:$rA, u16imm:$imm)>; +def : InstAlias<"cmplw $rA, $rB", (CMPLW CR0, gprc:$rA, gprc:$rB)>; +def : InstAlias<"cmpdi $rA, $imm", (CMPDI CR0, g8rc:$rA, s16imm:$imm)>; +def : InstAlias<"cmpd $rA, $rB", (CMPD CR0, g8rc:$rA, g8rc:$rB)>; +def : InstAlias<"cmpldi $rA, $imm", (CMPLDI CR0, g8rc:$rA, u16imm:$imm)>; +def : InstAlias<"cmpld $rA, $rB", (CMPLD CR0, g8rc:$rA, g8rc:$rB)>; + llvm-svn: 184435
* Make sure ar is creating a new file instead of updating an existing one.Rafael Espindola2013-06-201-0/+1
| | | | | | Should fix the bots that are seeing a corrupted file from a previous run. llvm-svn: 184424
* Add r184420 back, but also handle long file names.Rafael Espindola2013-06-201-0/+8
| | | | | | | | | | Original message: Don't include directory names in archives. This matches the behavior of both gnu and os x versions of ar. llvm-svn: 184423
* Revert "Don't include directory names in archives."Rafael Espindola2013-06-201-6/+0
| | | | | | | This reverts commit 184420. Investigating the bot failures. llvm-svn: 184421
* Don't include directory names in archives.Rafael Espindola2013-06-201-0/+6
| | | | | | This matches the behavior of both gnu and os x versions of ar. llvm-svn: 184420
* Optimize register parsing for MipsAsmParser. Allow symbolic aliases for FPU ↵Vladimir Medic2013-06-201-1/+2
| | | | | | registers. llvm-svn: 184411
* DebugInfo: don't use location lists when the location covers the whole ↵David Blaikie2013-06-203-27/+67
| | | | | | | | | | | | | function anyway Fix up three tests - one that was relying on abbreviation number, another relying on a location list in this case (& testing raw asm, changed that to use dwarfdump on the debug_info now that that's where the location is), and another which was added in r184368 - exposing a bug in that fix that is exposed when we emit the location inline rather than through a location list. Fix that bug while I'm here. llvm-svn: 184387
* Spelling correctionDavid Blaikie2013-06-191-2/+2
| | | | llvm-svn: 184370
* DebugInfo: PR14763/r183329 correct the location of indirect parametersDavid Blaikie2013-06-191-0/+70
| | | | | | | | | | | | | | | | We had been papering over a problem with location info for non-trivial types passed by value by emitting their type as references (this caused the debugger to interpret the location information correctly, but broke the type of the function). r183329 corrected the type information but lead to the debugger interpreting the pointer parameter as the value - the debug info describing the location needed an extra dereference. Use a new flag in DIVariable to add the extra indirection (either by promoting an existing DW_OP_reg (parameter passed in a register) to DW_OP_breg + 0 or by adding DW_OP_deref to an existing DW_OP_breg + n (parameter passed on the stack). llvm-svn: 184368
* Spell correct (s/begining/beginning/)David Blaikie2013-06-191-11/+11
| | | | llvm-svn: 184362
* llvm-dwarfdump: Add support for dumping the .debug_loc sectionDavid Blaikie2013-06-193-0/+39
| | | | | | | | | This is a basic implementation - we still don't have any support (that I know of) for dumping DWARF expressions in a meaningful way, so the location information itself is just printed as a sequence of bytes as we do elsewhere. llvm-svn: 184361
* [MC/DWARF] Generate multiple .debug_line entries for adjacent .loc directivesUlrich Weigand2013-06-191-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | The compiler occasionally generates multiple .loc directives in a row (at the same instruction address). These need to be transformed into multple actual .debug_line table entries, since they are used to signal certain information to the debugger (e.g. if the opening brace of a function body is on the same line as the declaration). The MCAsmStreamer version of EmitDwarfLocDirective handles this correctly by emitting a .loc directive every time it is called. However, the MCObjectStream version simply defaults to recording the information and emitting only a single table entry later, e.g. when EmitInstruction is called. This patch introduces a MCAsmStreamer::EmitDwarfLocDirective version that emits a line table entry for a .loc directive that may already be pending before recording the new directive. (This is similar to how this is handled in GNU as.) With this patch (and the code alignment factor patch) applied, I'm now getting identical DWARF .debug sections for all test-suite object files on PowerPC for the internal and the external assembler. llvm-svn: 184357
* Move StructurizeCFG out of R600 to generic Transforms.Matt Arsenault2013-06-192-0/+51
| | | | | | Register it with PassManager llvm-svn: 184343
* LSR: Fix the parameters used to compute the scaling factor cost.Quentin Colombet2013-06-191-0/+68
| | | | | | | | | | | | | Prior to this change, the considered addressing modes may be invalid since the maximum and minimum offsets were not taking into account. This was causing an assertion failure. The added test case exercices that behavior. <rdar://problem/14199725> Assertion failed: (CurScaleCost >= 0 && "Legal addressing mode has an illegal cost!") llvm-svn: 184341
* SLPVectorizer: handle scalars that are extracted from vectors (using ↵Nadav Rotem2013-06-191-0/+59
| | | | | | ExtractElementInst). llvm-svn: 184325
* SLPVectorizer: start constructing chains at stores that are not power of two.Nadav Rotem2013-06-191-0/+46
| | | | | | | | The type <3 x i8> is a common in graphics and we want to be able to vectorize it. This changes accelerates bullet by 12% and 471_omnetpp by 5%. llvm-svn: 184317
* Remove the 'R' modifier.Rafael Espindola2013-06-191-0/+2
| | | | | | | It is not present in GNU or OS X versions and doesn't make a lot of sense for llvm-ar. llvm-svn: 184306
* SLPVectorizer: vectorize compares and selects.Nadav Rotem2013-06-191-0/+32
| | | | llvm-svn: 184282
* [yaml2obj][ELF] Beef up this test a bit.Sean Silva2013-06-191-0/+1
| | | | llvm-svn: 184269
* [yaml2obj][ELF] Support ELFOSABI_* enum.Sean Silva2013-06-191-0/+10
| | | | llvm-svn: 184268
* [yaml2obj][ELF] Support st_info through `Binding` and `Type` YAML keys.Sean Silva2013-06-191-0/+4
| | | | llvm-svn: 184263
* [yaml2obj][ELF] Ensure STN_UNDEF entry is present.Sean Silva2013-06-181-1/+0
| | | | llvm-svn: 184258
* [yaml2obj][ELF] Rudimentary symbol table support.Sean Silva2013-06-181-0/+22
| | | | | | Currently, we only output the name. llvm-svn: 184255
* ARM: Add optional datatype suffix to NEON mvn asm syntax.Jim Grosbach2013-06-181-0/+39
| | | | | | rdar://14194152 llvm-svn: 184244
* AArch64: remove accidental test output file.Tim Northover2013-06-181-208/+0
| | | | llvm-svn: 184236
* Change the arm assembler to support this from the v7c spec:Kevin Enderby2013-06-182-0/+5
| | | | | | | | | | | | | | | "When assembling to the ARM instruction set, the .N qualifier produces an assembler error and the .W qualifier has no effect." In the pre-matcher handler in the asm parser the ".w" (wide) qualifier when in ARM mode is now discarded. And an error message is now produced when the ".n" (narrow) qualifier is used in ARM mode. Test cases for these were added. rdar://14064574 llvm-svn: 184224
* During SelectionDAG building explicitly set a node to constant zero when theQuentin Colombet2013-06-184-5/+41
| | | | | | | | | | | | value is zero. This allows optmizations to kick in more easily. Fix some test cases so that they remain meaningful (i.e., not completely dead coded) when optimizations apply. <rdar://problem/14096009> superfluous multiply by high part of zero-extended value. llvm-svn: 184222
* Mips ELF: Mark object file as ABI compliant Jack Carter2013-06-182-12/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | When producing objects that are abi compliant we are marking neither the object file nor the assembly file correctly and thus generate warnings. We need to set the EF_CPIC flag in the ELF header when generating direct object. Note that the warning is only generated when compiling without PIC. When compiling with clang the warning will be suppressed by supplying: -Wa,-mno-shared -Wa,-call_nonpic Also the following directive should also be added: .option pic0 when compiling without PIC, This eliminates the need for supplying: -mno-shared -call_nonpic on the assembler command line. Patch by Douglas Gilmore llvm-svn: 184220
* Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit2013-06-181-0/+9
| | | | | | | | For decoding, keep the current behavior of always decoding these as their REP versions. In the future, this could be improved to recognize the cases where these behave as XACQUIRE and XRELEASE and decode them as such. llvm-svn: 184207
* Basic support for parsing Mach-O universal binaries in LLVMObject libraryAlexey Samsonov2013-06-182-0/+6
| | | | llvm-svn: 184191
* ARM: fix literal load with positive offset encodingAmaury de la Vieuville2013-06-181-1/+20
| | | | | | | | | | | | When using a positive offset, literal loads where encoded as if it was negative, because: - The sign bit was not assigned to an operand - The addrmode_imm12 operand was not encoding the sign bit correctly This patch also makes the assembler look at the .w/.n specifier for loads. llvm-svn: 184182
* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-181-0/+16
| | | | llvm-svn: 184181
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-181-2/+55
| | | | | | | | This fixes two previous issues: - Negative offsets were not correctly disassembled - The decoded opcodes were not the right one llvm-svn: 184180
* ARM: thumb stores cannot use PC as dest registerAmaury de la Vieuville2013-06-181-0/+37
| | | | llvm-svn: 184179
* Reenable, improve, and add MI-Sched unit tests.Andrew Trick2013-06-173-15/+60
| | | | llvm-svn: 184134
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