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| author | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-18 08:02:56 +0000 |
|---|---|---|
| committer | Amaury de la Vieuville <amaury.dlv@gmail.com> | 2013-06-18 08:02:56 +0000 |
| commit | e2bb1d150cff94bac6cf5b3121de4be92ca73e0b (patch) | |
| tree | 376c10ed9df2b477698072b372cd0642e3a805cb /llvm/test | |
| parent | 302ba2314a752943c1484f359e2f7a9485ecdba2 (diff) | |
| download | bcm5719-llvm-e2bb1d150cff94bac6cf5b3121de4be92ca73e0b.tar.gz bcm5719-llvm-e2bb1d150cff94bac6cf5b3121de4be92ca73e0b.zip | |
ARM: thumb stores cannot use PC as dest register
llvm-svn: 184179
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/invalid-STR-thumb.txt | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-STR-thumb.txt b/llvm/test/MC/Disassembler/ARM/invalid-STR-thumb.txt new file mode 100644 index 00000000000..b2da70cdf8c --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/invalid-STR-thumb.txt @@ -0,0 +1,37 @@ +# invalid STRi12 Rn=PC +# RUN: echo "0xcf 0xf8 0x00 0x00" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRi8 Rn=PC +# RUN: echo "0x4f 0xf8 0x00 0x0c" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRs Rn=PC +# RUN: echo "0x4f 0xf8 0x00 0x00" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRBi12 Rn=PC +# RUN: echo "0x0f 0xf8 0x00 0x00" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRBi8 Rn=PC +# RUN: echo "0x0f 0xf8 0x00 0x0c" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRBs Rn=PC +# RUN: echo "0x0f 0xf8 0x00 0x00" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRHi12 Rn=PC +# RUN: echo "0xaf 0xf8 0x00 0x00" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRHi8 Rn=PC +# RUN: echo "0x2f 0xf8 0x00 0x0c" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRHs Rn=PC +# RUN: echo "0x2f 0xf8 0x00 0x00" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRBT Rn=PC +# RUN: echo "0x0f 0xf8 0x00 0x0e" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRHT Rn=PC +# RUN: echo "0x2f 0xf8 0x00 0x0e" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# invalid STRT Rn=PC +# RUN: echo "0x4f 0xf8 0x00 0x0e" | llvm-mc -triple=thumbv7 -disassemble 2>&1 | FileCheck %s + +# CHECK: invalid instruction encoding |
