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* [ARM] Add DSP build attribute and extension targetingBradley Smith2016-01-156-4/+55
| | | | llvm-svn: 257885
* [ARM] Add new system registers to ARMv8-M Baseline/MainlineBradley Smith2016-01-154-0/+417
| | | | llvm-svn: 257884
* [ARM] Add ARMv8-M security extension instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-151-2/+93
| | | | llvm-svn: 257883
* [ARM] Add ARMv8-A semaphore/atomic instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-152-0/+77
| | | | llvm-svn: 257882
* [ARM] Add B.W and CBZ instructions to ARMv8-M BaselineBradley Smith2016-01-153-0/+23
| | | | llvm-svn: 257881
* [ARM] Add SDIV/UDIV instructions to ARMv8-M BaselineBradley Smith2016-01-151-0/+8
| | | | llvm-svn: 257880
* [ARM] Add MOVW/MOVT instructions to ARMv8-M Baseline/MainlineBradley Smith2016-01-153-2/+39
| | | | llvm-svn: 257879
* [ARM] Add ARMv8-M Baseline/Mainline LLVM targetingBradley Smith2016-01-152-0/+41
| | | | llvm-svn: 257878
* [ARM] Split out ARMv8-A semaphores and atomics and ARMv7 clrex as separate ↵Bradley Smith2016-01-153-30/+30
| | | | | | features llvm-svn: 257877
* [X86][SSE] Added more exhaustive merge consecutive load testsSimon Pilgrim2016-01-152-0/+568
| | | | llvm-svn: 257876
* [InstCombine] Rewrite bswap/bitreverse handling completely.James Molloy2016-01-155-114/+146
| | | | | | | | | | | | | | There are several requirements that ended up with this design; 1. Matching bitreversals is too heavyweight for InstCombine and doesn't really need to be done so early. 2. Bitreversals and byteswaps are very related in their matching logic. 3. We want to implement support for matching more advanced bswap/bitreverse patterns like partial bswaps/bitreverses. 4. Bswaps are best matched early in InstCombine. The result of these is that a new utility function is created in Transforms/Utils/Local.h that can be configured to search for bswaps, bitreverses or both. InstCombine uses it to find only bswaps, CGP uses it to find only bitreversals. We can then extend the matching logic in one place only. llvm-svn: 257875
* Reapply r257105 "[Verifier] Check that debug values have proper size"Keno Fischer2016-01-1536-191/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I originally reapplied this in 257550, but had to revert again due to bot breakage. The only change in this version is to allow either the TypeSize or the TypeAllocSize of the variable to be the one represented in debug info (hopefully in the future we can figure out how to encode the difference). Additionally, several bot failures following r257550, were due to optimizer bugs now fixed in r257787 and r257795. r257550 commit message was: ``` The follow extra changes were made to test cases: Manually making the variable be the actual type instead of a pointer to avoid pointer-size differences in generic code: LLVM :: DebugInfo/Generic/2010-03-24-MemberFn.ll LLVM :: DebugInfo/Generic/2010-04-06-NestedFnDbgInfo.ll LLVM :: DebugInfo/Generic/2010-05-03-DisableFramePtr.ll LLVM :: DebugInfo/Generic/varargs.ll Delete sizing information from debug info for the same reason (but the presence of the pointer was important to the test case): LLVM :: DebugInfo/Generic/restrict.ll LLVM :: DebugInfo/Generic/tu-composite.ll LLVM :: Linker/type-unique-type-array-a.ll LLVM :: Linker/type-unique-simple2.ll Fixing an incorrect DW_OP_deref LLVM :: DebugInfo/Generic/2010-05-03-OriginDIE.ll Fixing a missing DW_OP_deref LLVM :: DebugInfo/Generic/incorrect-variable-debugloc.ll Additionally, clang should no longer complain during bootstrap should no longer happen after r257534. The original commit message was: `` Summary: Teach the Verifier to make sure that the storage size given to llvm.dbg.declare or the value size given to llvm.dbg.value agree with what is declared in DebugInfo. This is implicitly assumed in a number of passes (e.g. in SROA). Additionally this catches a number of common mistakes, such as passing a pointer when a value was intended or vice versa. One complication comes from stack coloring which modifies the original IR when it merges allocas in order to make sure that if AA falls back to the IR it gets the correct result. However, given this new invariant, indiscriminately replacing one alloca by a different (differently sized one) is no longer valid. Fix this by just undefing out any use of the alloca in a dbg.declare in this case. Additionally, I had to fix a number of test cases. Of particular note: - I regenerated dbg-changes-codegen-branch-folding.ll from the given source as it was affected by the bug fixed in r256077 - two-cus-from-same-file.ll was changed to avoid having a variable-typed debug variable as that would depend on the target, even though this test is supposed to be generic - I had to manually declared size/align for reference type. See also the discussion for D14275/r253186. - fpstack-debuginstr-kill.ll required changing `double` to `long double` - most others were just a question of adding OP_deref `` ``` llvm-svn: 257850
* [codeview] Translate file table offsets to filenames and print themReid Kleckner2016-01-151-5/+5
| | | | llvm-svn: 257846
* Fix AArch64ConditionOptimizerWeiming Zhao2016-01-151-0/+36
| | | | | | | | | | | | | | Summary: This pass may modify the Cmp operands. However, the flag reg may be used by both the branch and CSEL. Modifying CMP will have side effect on CSEL. Reviewers: t.p.northover Subscribers: llvm-commits, aemerson, rengolin Differential Revision: http://reviews.llvm.org/D16147 llvm-svn: 257844
* [sancov] html reportMike Aizatsky2016-01-141-0/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D16161 llvm-svn: 257824
* [Orc] Add support for EH-frame registration to the Orc Remote Target utilityLang Hames2016-01-142-0/+64
| | | | | | | | | classes. OrcRemoteTargetClient::RCMemoryManager will now register EH frames with the server automatically. This allows remote-execution of code that uses exceptions. llvm-svn: 257816
* [Hexagon] Use S2_lsr_i_r instead of S2_extractu to obtain upper halfwordKrzysztof Parzyszek2016-01-141-0/+13
| | | | llvm-svn: 257815
* [SLP] Vectorize the index computations of getelementptr instructions.Matthew Simpson2016-01-142-0/+369
| | | | | | | | | | | | | | | This patch seeds the SLP vectorizer with getelementptr indices. The primary motivation in doing so is to vectorize gather-like idioms beginning with consecutive loads (e.g., g[a[0] - b[0]] + g[a[1] - b[1]] + ...). While these cases could be vectorized with a top-down phase, seeding the existing bottom-up phase with the index computations avoids the complexity, compile-time, and phase ordering issues associated with a full top-down pass. Only bundles of single-index getelementptrs with non-constant differences are considered for vectorization. Differential Revision: http://reviews.llvm.org/D14829 llvm-svn: 257800
* [SROA] Also insert a bit piece expression if only one piece is neededKeno Fischer2016-01-141-0/+37
| | | | | | | | | | | | | | Summary: If SROA creates only one piece (e.g. because the other is not needed), it still needs to create a bit_piece expression if that bit piece is smaller than the original size of the alloca. Reviewers: aprantl Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16187 llvm-svn: 257795
* [CodeGen] Don't assume fp_to_fp16 produces i16 when legalizing it.Ahmed Bougacha2016-01-141-2/+11
| | | | | | | | | | | | | | Since r230276, we support an improved legalization for f64->f16, which goes through a temporary f32, improving codegen when f32->f16 is legal but not f64->f16. This requires unsafe-fp-math. However, that legalization assumed that the second step, producing a pseudo-softened f16, had type i16. That's not true on targets with illegal i16, such as ARM. Use the initial f64->f16 result type instead. llvm-svn: 257794
* [codeview] Dump CodeView inlinee lines subsectionReid Kleckner2016-01-142-0/+65
| | | | llvm-svn: 257790
* [Utils] Fix incorrect dbg.declare store conversionKeno Fischer2016-01-141-0/+36
| | | | | | | | | | | | | | | | Summary: The dbg.declare -> dbg.value conversion did not check which operand of the store instruction the alloca was passed to. As a result code that stored the address of an alloca, rather than storing to the alloca, would still trigger the conversion routine, leading to the insertion of an incorrect dbg.value intrinsic. Reviewers: aprantl Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16169 llvm-svn: 257787
* dsymutil: Provide better warnings when clang modules cannot be found.Adrian Prantl2016-01-142-12/+25
| | | | | | rdar://problem/22823264 llvm-svn: 257784
* Revert "Stop increasing alignment of externally-visible globals on ELF ↵James Y Knight2016-01-141-9/+9
| | | | | | | | platforms." This reverts commit r257719, due to PR26144. llvm-svn: 257775
* Revert "[ValueTracking] Understand more select patterns in ComputeKnownBits"James Molloy2016-01-141-62/+0
| | | | | | This reverts commit r257769. Backing this out because of stage2 failures. llvm-svn: 257773
* [Hexagon] Expand pseudo instruction Insert4Krzysztof Parzyszek2016-01-141-0/+112
| | | | llvm-svn: 257771
* Unxfail passing testcase on HexagonKrzysztof Parzyszek2016-01-141-1/+1
| | | | llvm-svn: 257770
* [ValueTracking] Understand more select patterns in ComputeKnownBitsJames Molloy2016-01-141-0/+62
| | | | | | | | | | | | | Some patterns of select+compare allow us to know exactly the value of the uppermost bits in the select result. For example: %b = icmp ugt i32 %a, 5 %c = select i1 %b, i32 2, i32 %a Here we know that %c is bounded by 5, and therefore KnownZero = ~APInt(5).getActiveBits() = ~7. There are several such patterns, and this patch attempts to understand a reasonable subset of them - namely when the base values are the same (as above), and when they are related by a simple (add nsw), for example (add nsw %a, 4) and %a. llvm-svn: 257769
* [Hexagon] Handle branches with non-mbb operandsKrzysztof Parzyszek2016-01-141-0/+46
| | | | llvm-svn: 257768
* [GlobalsAA] Relax condition in checking globals as args to functionsVaivaswatha Nagaraj2016-01-141-0/+65
| | | | | | | | | | | | | | | | | Summary: Since globals may escape as function arguments (even when they have been found to be non-escaping, because of optimizations such as memcpyoptimizer that replaces stores with memcpy), all arguments to a function are checked during query to make sure they are identifiable. At that time, also ensure we return a conservative result only if the arguments don't alias to our global. Reviewers: hfinkel, jmolloy Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16140 llvm-svn: 257750
* AVX512: VMOVDQA32/64 (load) intrinsic implementation.Igor Breger2016-01-142-3/+112
| | | | | | Differential Revision: http://reviews.llvm.org/D16142 llvm-svn: 257749
* [AArch64] Don't assume extractelt constant index when matching shuffle.Ahmed Bougacha2016-01-141-0/+37
| | | | llvm-svn: 257735
* Mark remote-JIT tests as XFAIL, as well as win32, for targeting mingw32.NAKAMURA Takumi2016-01-1422-22/+22
| | | | llvm-svn: 257732
* [X86] Don't alter HasOpaqueSPAdjustment after we've relied on itDavid Majnemer2016-01-141-0/+53
| | | | | | | | | | | | | | We rely on HasOpaqueSPAdjustment not changing after we've calculated things based on it. Things like whether or not we can use 'rep;movs' to copy bytes around, that sort of thing. If it changes, invariants in the backend will quietly break. This situation arose when we had a call to memcpy *and* a COPY of the FLAGS register where we would attempt to reference local variables using %esi, a register that was clobbered by the 'rep;movs'. This fixes PR26124. llvm-svn: 257730
* [codeview] Regenerate C++ display name test case and update commentsReid Kleckner2016-01-141-21/+34
| | | | | | | | | | Clang generates good display names for codeview since r255744, and the change to make LLVM use them was accidentally included in r257658. This change just updates the comments and test case to reflect reality better. llvm-svn: 257723
* Stop increasing alignment of externally-visible globals on ELFJames Y Knight2016-01-131-9/+9
| | | | | | | | | | | | | | platforms. With ELF, the alignment of a global variable in a shared library will get copied into an executables linked against it, if the executable even accesss the variable. So, it's not possible to implicitly increase alignment based on access patterns, or you'll break existing binaries. This happened to affect libc++'s std::cout symbol, for example. See thread: http://thread.gmane.org/gmane.comp.compilers.clang.devel/45311 llvm-svn: 257719
* [TLS] New lower emutls pass, fix linkage bugs.Chih-Hung Hsieh2016-01-136-60/+186
| | | | | | | | | | | | | | | | | | | Previous implementation in http://reviews.llvm.org/D10522 created external references to __emutls_v.* variables. Such references are inaccurate and cannot be handled by all linkers, e.g. Android dynamic and gold linkers for aarch64. Now a new LowerEmuTLS pass to go through all global variables, and add emutls_v.* and emutls_t.* variables. These __emutls* variables have the same linkage and visibility as the associated user defined TLS variable. Also removed old code that dump __emutls* variables in AsmPrinter.cpp, and updated TLS unit tests. Differential Revision: http://reviews.llvm.org/D15300 llvm-svn: 257718
* Add a triple to the test.Rafael Espindola2016-01-131-1/+1
| | | | | | Sorry for forgetting it the first time. llvm-svn: 257705
* Convert a few assert failures into proper errors.Rafael Espindola2016-01-131-0/+21
| | | | | | Fixes PR25944. llvm-svn: 257697
* Display detailed profile summary in llvm-profdata tool.Easwaran Raman2016-01-131-0/+20
| | | | | | | | | | | This adds a detailed profile summary in llvm-profdata. The summary is in the form of one or more triples of the form (P, N, M) which is interpreted as if we look at the Top-N counts in the profile, their sum accounts for P percentage of the sum of all counts in the program and the minimum count in the Top-N is M. Differential Revision: http://reviews.llvm.org/D16005 llvm-svn: 257680
* Relax testcase so it works on Windows.Adrian Prantl2016-01-131-2/+3
| | | | llvm-svn: 257667
* AMDGPU/SI: Update ISA version for FIJIChangpeng Fang2016-01-131-0/+2
| | | | llvm-svn: 257666
* dsymutil: Only warn about missing clang modules once.Adrian Prantl2016-01-132-0/+12
| | | | | | rdar://problem/22269336 llvm-svn: 257664
* [readobj] Expand CodeView dumping functionalityReid Kleckner2016-01-136-207/+208
| | | | | | | | | | | | | | | | This rewrites and expands the existing codeview dumping functionality in llvm-readobj using techniques similar to those in lib/Object. This defines a number of new records and enums useful for reading memory mapped codeview sections in COFF objects. The dumper is intended as a testing tool for LLVM as it grows more codeview output capabilities. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D16104 llvm-svn: 257658
* [WebAssembly] MCFixupKindInfo's TargetSize is in bits rather than bytes.Dan Gohman2016-01-131-0/+14
| | | | llvm-svn: 257655
* AMDGPU/SI: Fix a GPU hang with POS_W_FLOAT enabledMarek Olsak2016-01-131-0/+17
| | | | | | | | | | Reviewers: tstellarAMD, arsenm Subscribers: arsenm Differential Revision: http://reviews.llvm.org/D16037 llvm-svn: 257625
* AMDGPU/SI: Add tests for non-void functions and InitialPSInputAddrMarek Olsak2016-01-131-0/+228
| | | | | | | | Reviewers: tstellarAMD, arsenm Differential Revision: http://reviews.llvm.org/D16036 llvm-svn: 257624
* AMDGPU/SI: Add SI Machine SchedulerNicolai Haehnle2016-01-131-0/+55
| | | | | | | | | | | | | | | | Summary: It is off by default, but can be used with --misched=si Patch by: Axel Davy Reviewers: arsenm, tstellarAMD, nhaehnle Subscribers: nhaehnle, solenskiner, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D11885 llvm-svn: 257609
* [Hexagon] Do not insert non-phis before phis in bit simplificationKrzysztof Parzyszek2016-01-131-0/+58
| | | | llvm-svn: 257606
* [AVX512] Adding PMOVSXBD/W/Q , PMOVZSDQ and PMOVZSWD/Q Intrinsics .Michael Zuckerman2016-01-134-0/+378
| | | | | | Differential Revision: http://reviews.llvm.org/D16111 llvm-svn: 257604
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