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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-01-14 02:12:30 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-01-14 02:12:30 +0000 |
| commit | dfc77357a0eb17412e284b4d0bad37bbf2c39c2e (patch) | |
| tree | 2c460f16b5f73175d3c862305b7b31d0d209bcb5 /llvm/test | |
| parent | e7268c1a9aeca852b52f43c119ba74cc8832258d (diff) | |
| download | bcm5719-llvm-dfc77357a0eb17412e284b4d0bad37bbf2c39c2e.tar.gz bcm5719-llvm-dfc77357a0eb17412e284b4d0bad37bbf2c39c2e.zip | |
[AArch64] Don't assume extractelt constant index when matching shuffle.
llvm-svn: 257735
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-neon-copy.ll | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll b/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll index 83b1cac70f5..c0d9e5eb27d 100644 --- a/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll +++ b/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll @@ -902,6 +902,43 @@ define <8 x i8> @getl(<16 x i8> %x) #0 { ret <8 x i8> %vecinit14 } +; CHECK-LABEL: test_extracts_inserts_varidx_extract: +; CHECK: str q0 +; CHECK: add x[[PTR:[0-9]+]], {{.*}}, w0, sxtw #1 +; CHECK-DAG: ld1 { v[[R:[0-9]+]].h }[0], [x[[PTR]]] +; CHECK-DAG: ins v[[R]].h[1], v0.h[1] +; CHECK-DAG: ins v[[R]].h[2], v0.h[2] +; CHECK-DAG: ins v[[R]].h[3], v0.h[3] +define <4 x i16> @test_extracts_inserts_varidx_extract(<8 x i16> %x, i32 %idx) { + %tmp = extractelement <8 x i16> %x, i32 %idx + %tmp2 = insertelement <4 x i16> undef, i16 %tmp, i32 0 + %tmp3 = extractelement <8 x i16> %x, i32 1 + %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 1 + %tmp5 = extractelement <8 x i16> %x, i32 2 + %tmp6 = insertelement <4 x i16> %tmp4, i16 %tmp5, i32 2 + %tmp7 = extractelement <8 x i16> %x, i32 3 + %tmp8 = insertelement <4 x i16> %tmp6, i16 %tmp7, i32 3 + ret <4 x i16> %tmp8 +} + +; CHECK-LABEL: test_extracts_inserts_varidx_insert: +; CHECK: str h0, [{{.*}}, w0, sxtw #1] +; CHECK-DAG: ldr d[[R:[0-9]+]] +; CHECK-DAG: ins v[[R]].h[1], v0.h[1] +; CHECK-DAG: ins v[[R]].h[2], v0.h[2] +; CHECK-DAG: ins v[[R]].h[3], v0.h[3] +define <4 x i16> @test_extracts_inserts_varidx_insert(<8 x i16> %x, i32 %idx) { + %tmp = extractelement <8 x i16> %x, i32 0 + %tmp2 = insertelement <4 x i16> undef, i16 %tmp, i32 %idx + %tmp3 = extractelement <8 x i16> %x, i32 1 + %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 1 + %tmp5 = extractelement <8 x i16> %x, i32 2 + %tmp6 = insertelement <4 x i16> %tmp4, i16 %tmp5, i32 2 + %tmp7 = extractelement <8 x i16> %x, i32 3 + %tmp8 = insertelement <4 x i16> %tmp6, i16 %tmp7, i32 3 + ret <4 x i16> %tmp8 +} + define <4 x i16> @test_dup_v2i32_v4i16(<2 x i32> %a) { ; CHECK-LABEL: test_dup_v2i32_v4i16: ; CHECK: dup v0.4h, v0.h[2] |
