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rdar://problem/9269047
llvm-svn: 129387
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llvm-svn: 129385
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UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make these heuristic adjustments to node latency work,
I also needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.
llvm-svn: 129383
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its Inst{23}
be specified as '1' (add = TRUE).
Also add a utility function for Thumb2.
llvm-svn: 129377
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Ld/St Multiple.
llvm-svn: 129365
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llvm-svn: 129362
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llvm-svn: 129361
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stores of arguments in the same cache line. This fixes the second half of
<rdar://problem/8674845>.
llvm-svn: 129345
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llvm-svn: 129327
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test for invalid hexadecimals.
llvm-svn: 129326
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Encoding T1 (tBcc)
if cond == '1110' then UNDEFINED;
rdar://problem/9268681
llvm-svn: 129325
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reassociation opportunities are exposed. This fixes a bug where
the nested reassociation expects to be the IR to be consistent,
but it isn't, because the outer reassociation has disconnected
some of the operands. rdar://9167457
llvm-svn: 129324
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llvm-svn: 129323
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rdar://problem/9267838
llvm-svn: 129320
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has some bugs. If this is interesting functionality, it should be
reimplemented in the argpromotion pass.
llvm-svn: 129314
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llvm-svn: 129311
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llvm-svn: 129306
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llvm-svn: 129304
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instructions are incorrectly disassembled.
rdar://problem/9266265
llvm-svn: 129298
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more copies. rdar://9266679
llvm-svn: 129297
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them as
invalid instructions.
llvm-svn: 129286
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--- Reverse-merging r129235 into '.':
D test/Feature/bb_attrs.ll
U include/llvm/BasicBlock.h
U include/llvm/Bitcode/LLVMBitCodes.h
U lib/VMCore/AsmWriter.cpp
U lib/VMCore/BasicBlock.cpp
U lib/AsmParser/LLParser.cpp
U lib/AsmParser/LLLexer.cpp
U lib/AsmParser/LLToken.h
U lib/Bitcode/Reader/BitcodeReader.cpp
U lib/Bitcode/Writer/BitcodeWriter.cpp
llvm-svn: 129259
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* Add a "landing pad" attribute to the BasicBlock.
* Modify the bitcode reader and writer to handle said attribute.
Later: The verifier will ensure that the landing pad attribute is used in the
appropriate manner. I.e., not applied to the entry block, and applied only to
basic blocks that are branched to via a `dispatch' instruction.
(This is a work-in-progress.)
llvm-svn: 129235
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InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.
llvm-svn: 129223
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for pointing this out
llvm-svn: 129217
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And don't append the name over and over again in the loop.
llvm-svn: 129210
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is an array of structures doesn't imply it's a ConstantArray of
ConstantStruct.
llvm-svn: 129207
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indirectbr.
llvm-svn: 129203
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delete the instruction pointed to by CGP's current instruction
iterator, leading to a crash on the testcase. This fixes PR9578.
llvm-svn: 129200
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it's completely safe to cache the AST across LICM runs even with this fix,
but this fix can't hurt.
llvm-svn: 129198
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llvm-svn: 129197
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llvm-svn: 129195
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they thought they were, because alternation was expanding
wrong in {{}}'s.
llvm-svn: 129194
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with undef arguments.
llvm-svn: 129185
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llvm-svn: 129184
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llvm-svn: 129172
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If lower bound is more then upper bound then consider it is an unbounded array.
An array is unbounded if non-zero lower bound is same as upper bound.
If lower bound and upper bound are zero than array has one element.
llvm-svn: 129156
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is lowered into a call to the specified trap function at sdisel time.
llvm-svn: 129152
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PR9650
rdar://problem/9257565
llvm-svn: 129147
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PR9648
rdar://problem/9257634
llvm-svn: 129146
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Add tests for that.
llvm-svn: 129137
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Add more test cases to exercise the logical branches related to the above change.
llvm-svn: 129117
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llvm-svn: 129116
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llvm-svn: 129114
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llvm-svn: 129111
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instruction. rdar://9249183.
llvm-svn: 129107
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Patch by Roman Divacky.
Fixes PR9361.
llvm-svn: 129106
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induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.
Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing
llvm-svn: 129100
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llvm-svn: 129099
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extend instructions.
Add some test cases.
llvm-svn: 129098
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