summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorJohnny Chen <johnny.chen@apple.com>2011-04-07 19:28:58 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-04-07 19:28:58 +0000
commit04efb8f6ce9355f66ad2e8b0d5898ef62e4944fa (patch)
tree0f9e0fbebcedef6c7c27e37e65ffef1b80795eb0 /llvm/test
parent2f8d10e8d7950bf832ca0028927a5fd30de55d0b (diff)
downloadbcm5719-llvm-04efb8f6ce9355f66ad2e8b0d5898ef62e4944fa.tar.gz
bcm5719-llvm-04efb8f6ce9355f66ad2e8b0d5898ef62e4944fa.zip
Add sanity checking for invalid register encodings for signed/unsigned extend instructions.
Add some test cases. llvm-svn: 129098
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Disassembler/ARM/arm-tests.txt6
-rw-r--r--llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt11
2 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/ARM/arm-tests.txt b/llvm/test/MC/Disassembler/ARM/arm-tests.txt
index a044b0d7db3..3bed28edffa 100644
--- a/llvm/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/llvm/test/MC/Disassembler/ARM/arm-tests.txt
@@ -248,3 +248,9 @@
# CHECK: lsl r3, r2, r1
0x12 0x31 0xa0 0xe1
+
+# CHECK: sxtab r9, r8, r5
+0x75 0x90 0xa8 0xe6
+
+# CHECK: sxtb r9, r5, ror #8
+0x75 0x94 0xaf 0xe6
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
new file mode 100644
index 00000000000..4ec681daf95
--- /dev/null
+++ b/llvm/test/MC/Disassembler/ARM/invalid-SXTB-arm.txt
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=390 Name=SXTBr_rot Format=ARM_FORMAT_EXTFRM(14)
+# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 0| 0: 1: 1: 0| 1: 0: 1: 0| 1: 1: 1: 1| 1: 1: 1: 1| 0: 1: 0: 0| 0: 1: 1: 1| 0: 1: 0: 1|
+# -------------------------------------------------------------------------------------------------
+#
+# A8.6.223 SXTB
+# if d == 15 || m == 15 then UNPREDICTABLE;
+0x75 0xf4 0xaf 0xe6
OpenPOWER on IntegriCloud