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* [DWARFv5] Parse new line-table header format.Paul Robinson2017-05-023-6/+144
| | | | | | | | | | | | The directory and file tables now have form-based content descriptors. Parse these and extract the per-directory/file records based on the descriptors. For now we support only DW_FORM_string (inline) for the path names; follow-up work will add support for indirect forms (i.e., DW_FORM_strp, strx<N>, and line_strp). Differential Revision: http://reviews.llvm.org/D32713 llvm-svn: 301978
* ARM: add arm1176j-f processorTim Northover2017-05-021-1/+4
| | | | | | | | | I doubt anyone actually uses it, and I'm not even entirely convinced it exists myself; but it is our default for "clang -arch armv6". Functionally, if it does exist it's identical to the arm1176jz-f from LLVM's point of view (the difference is apparently in the "Security Extensions"). llvm-svn: 301962
* [PartialInlining] Add more early filteringXinliang David Li2017-05-021-0/+19
| | | | | | | This is a follow up to the previous inline cost patch for quicker filtering. llvm-svn: 301959
* AMDGPU: Don't promote alloca to LDS for leaf functionsMatt Arsenault2017-05-022-29/+74
| | | | | | LDS use in leaf functions not currently handled. llvm-svn: 301958
* [Hexagon] Change iconst to emit 27bit relocationKrzysztof Parzyszek2017-05-021-1/+1
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301956
* [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCRELKrzysztof Parzyszek2017-05-022-0/+50
| | | | | | Patch by Sid Manning. llvm-svn: 301955
* [Hexagon] Don't ignore mult-cycle latency informationKrzysztof Parzyszek2017-05-021-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | The compiler was generating code that ends up ignoring a multiple latency dependence between two instructions by scheduling the intructions in back-to-back packets. The packetizer needs to end a packet if the latency of the current current insruction and the source in the previous packet is greater than 1 cycle. This case occurs when there is still room in the current packet, but scheduling the instruction causes a stall. Instead, the packetizer should start a new packet. Also, if the current packet already contains a stall, then it is okay to add another instruction to the packet that also causes a stall. This occurs when there are no instructions that can be scheduled in between the producer and consumer instructions. This patch changes the latency for loads to 2 cycles from 3 cycles. This change refects that a load only needs to be separated by one extra packet to eliminate the stall. Patch by Ikhlas Ajbar. llvm-svn: 301954
* [Hexagon] Make sure duplexed dealloc_returns are checked for double jumpsKrzysztof Parzyszek2017-05-021-0/+7
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301951
* SpeculativeExecution: Stop using whitelist for costsMatt Arsenault2017-05-022-0/+105
| | | | | | | Just let TTI's cost do this instead of arbitrarily restricting this. llvm-svn: 301950
* [Hexagon] Move checking AXOK to checkerKrzysztof Parzyszek2017-05-022-0/+13
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301949
* [Hexagon] Extract function that checks endloops with other branchesKrzysztof Parzyszek2017-05-022-19/+12
| | | | | | | | Change location number to point to conflicting branch instruction. Patch by Colin LeMahieu. llvm-svn: 301946
* Revert "Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and"Zachary Turner2017-05-0218-642/+157
| | | | | | | | This reverts commit c08155afc5d3230792da2ad30a046a8617735a73. This is causing undefined symbol errors with some of the constants. llvm-svn: 301944
* Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 andJoel Jones2017-05-0218-157/+642
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TLSDESC_ADD_LO12 relocations Rearrange ordering in AArch64.def to follow relocation encoding Fix name: R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC Add support for several "TLS", "TLSGD", and "TLSLD" relocations for ILP32 Fix return values from isNonILP32reloc Add implementations for R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC, R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC, *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC, *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC Modify error messages to give name of equivalent relocation in the ABI not being used, along with better checking for non-existent requested relocations. Added assembler support for "pg_hi21_nc" Relocation definitions added without implementations: R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21, R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19, R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL, R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL, R_AARCH64_P32_TLSDESC Fix encoding: R_AARCH64_P32_TLSDESC_ADR_PAGE21 Reviewers: Peter Smith Patch by: Joel Jones (jjones@cavium.com) Differential Revision: https://reviews.llvm.org/D32072 llvm-svn: 301939
* AMDGPU: Make intrinsics speculatableMatt Arsenault2017-05-023-24/+25
| | | | llvm-svn: 301937
* [PDB/CodeView] Read/write codeview inlinee line information.Zachary Turner2017-05-022-4/+28
| | | | | | | | Previously we wrote line information and file checksum information, but we did not write information about inlinee lines and functions. This patch adds support for that. llvm-svn: 301936
* Add new test case for addcarry. NFC.Amaury Sechet2017-05-021-0/+18
| | | | llvm-svn: 301932
* AMDGPU: Add AMDGPU_HS calling conventionMarek Olsak2017-05-021-0/+4
| | | | | | | | | | Reviewers: arsenm, nhaehnle Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D32644 llvm-svn: 301930
* [InstCombine] don't use DeMorgan's Law on integer constants (2nd try)Sanjay Patel2017-05-022-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was originally checked in here: https://reviews.llvm.org/rL301923 And reverted here: https://reviews.llvm.org/rL301924 Because there's a clang test that would fail after this. I fixed/removed the offending CHECK lines in: https://reviews.llvm.org/rL301928 So let's try this again. Original commit message: This is the fold that causes the infinite loop in BoringSSL (https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) when we fix instcombine demanded bits to prefer 'not' ops as in https://reviews.llvm.org/D32255. There are 2 or 3 problems with dyn_castNotVal, and I don't think we can reinstate https://reviews.llvm.org/D32255 until dyn_castNotVal is completely eliminated. 1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot. 2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors. 3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y) That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y) Differential Revision: https://reviews.llvm.org/D32665 llvm-svn: 301929
* revert r301923 : [InstCombine] don't use DeMorgan's Law on integer constantsSanjay Patel2017-05-022-10/+10
| | | | | | There's a clang test that is wrongly using -O1 and failing after this commit. llvm-svn: 301924
* [InstCombine] don't use DeMorgan's Law on integer constantsSanjay Patel2017-05-022-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is the fold that causes the infinite loop in BoringSSL (https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) when we fix instcombine demanded bits to prefer 'not' ops as in D32255. There are 2 or 3 problems with dyn_castNotVal, and I don't think we can reinstate D32255 until dyn_castNotVal is completely eliminated. 1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot. 2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors. 3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y) That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y) Differential Revision: https://reviews.llvm.org/D32665 llvm-svn: 301923
* [DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)Amaury Sechet2017-05-024-1209/+1185
| | | | | | | | | | | | Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo . Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32687 llvm-svn: 301922
* Add llvm::object::getELFSectionTypeName().Rafael Espindola2017-05-021-1/+1
| | | | | | | | | | | This is motivated by https://reviews.llvm.org/D32488 where I am trying to add printing of the section type for incompatible sections to LLD error messages. This patch allows us to use the same code in llvm-readobj and LLD instead of duplicating the function inside LLD. Patch by Alexander Richardson! llvm-svn: 301921
* [DAGCombine] (add X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)Amaury Sechet2017-05-021-11/+9
| | | | | | | | | | Summary: Common pattern when legalizing large integers operations. Similar to D32687, when the carry isn't used. Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Differential Revision: https://reviews.llvm.org/D32738 llvm-svn: 301919
* [X86][SSE] Add test for PR30264 (combining multiple constants inputs in a ↵Simon Pilgrim2017-05-021-0/+34
| | | | | | shuffle) llvm-svn: 301915
* [SelectionDAG] Improve support for promotion of <1 x fX> floating point ↵Simon Pilgrim2017-05-022-0/+72
| | | | | | | | | | | | argument types (PR31088) PR31088 demonstrated that we were assuming that only integers require promotion from <1 x iX> types, when in fact float types may require it as well - in this case half floats. This patch adds support for extension/truncation for both integer and float types. Differential Revision: https://reviews.llvm.org/D32391 llvm-svn: 301910
* [DAGCombiner] Improve MatchBswapHword logic (PR31357)Simon Pilgrim2017-05-021-43/+10
| | | | | | | | | | | | The existing code only looks at half of the tree when matching bswap + rol patterns ending in an OR tree (as opposed to a cascade). Patch originally introduced by Jim Lewis. Submitted on the behalf of Dinar Temirbulatov. Differential Revision: https://reviews.llvm.org/D32039 llvm-svn: 301907
* [PartialInlining] Hook up inline cost analysisXinliang David Li2017-05-022-3/+43
| | | | | | Differential Revision: http://reviews.llvm.org/D32666 llvm-svn: 301894
* [AVR] Save/restore the frame pointer for all functionsDylan McKay2017-05-023-19/+19
| | | | | | | A recent commit I made made it so that we only did this for signal or interrupt handlers. This broke normal functions. llvm-svn: 301893
* [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LENemanja Ivanovic2017-05-026-80/+89
| | | | | | | | | | | | | Fixes PR30730. This is a re-commit of a pulled commit. The commit was pulled because some software projects contained uses of Altivec vectors that violated alignment requirements. Known issues have now been fixed. Committing on behalf of Lei Huang. Differential Revision: https://reviews.llvm.org/D26861 llvm-svn: 301892
* [AArch64] armv8-A doesn't have LSE.Ahmed Bougacha2017-05-021-0/+8
| | | | | | | | | | | r288279 mistakenly added it to all arches, but it's only available from v8.1 onwards. The testcase is awkward, because (I suspect) of PR32873. Spotted by inspection. llvm-svn: 301890
* Revert r301880George Burgess IV2017-05-011-19/+0
| | | | | | | | | This change caused buildbot failures, apparently because we're not passing around types that InstSimplify is used to seeing. I'm not overly familiar with InstSimplify, so I'm reverting this until I can figure out what exactly is wrong. llvm-svn: 301885
* [CodeView] Write CodeView line information.Zachary Turner2017-05-013-2/+92
| | | | | | Differential Revision: https://reviews.llvm.org/D32716 llvm-svn: 301882
* [InstSimplify] Handle selects of GEPs with 0 offsetGeorge Burgess IV2017-05-011-0/+19
| | | | | | | | | In particular (since it wouldn't fit nicely in the summary): (select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V) Differential Revision: https://reviews.llvm.org/D31435 llvm-svn: 301880
* MachineFrameInfo: Track whether MaxCallFrameSize is computed yet; NFCMatthias Braun2017-05-012-2/+0
| | | | | | | | | | This tracks whether MaxCallFrameSize is computed yet. Ideally we would assert and fail when the value is queried before it is computed, however this fails various targets that need to be fixed first. Differential Revision: https://reviews.llvm.org/D32570 llvm-svn: 301851
* [NewGVN] Don't derive incorrect implications.Davide Italiano2017-05-011-0/+24
| | | | | | | | | | | | | | In the testcase attached, we believe %tmp1 implies %tmp4. where: br i1 %tmp1, label %bb2, label %bb7 br i1 %tmp4, label %bb5, label %bb7 because Wwhile looking at PredicateInfo stuffs we end up calling isImpliedTrueByMatchingCmp() with the arguments backwards. Differential Revision: https://reviews.llvm.org/D32718 llvm-svn: 301849
* [InstCombine] check one-use before applying DeMorgan nor/nand foldsSanjay Patel2017-05-011-6/+3
| | | | | | | | | | | | | | | If we have ~(~X & Y), it only makes sense to transform it to (X | ~Y) when we do not need the intermediate (~X & Y) value. In that case, we would need an extra instruction to generate ~Y + 'or' (as shown in the test changes). It's ok if we have multiple uses of ~X or Y, however. In those cases, we may not reduce the instruction count or critical path, but we might improve throughput because we can generate ~X and ~Y in parallel. Whether that actually makes perf sense or not for a target is something we can't answer in IR. Differential Revision: https://reviews.llvm.org/D32703 llvm-svn: 301848
* Object: Remove ModuleSummaryIndexObjectFile class.Peter Collingbourne2017-05-011-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D32195 llvm-svn: 301832
* [Hexagon] Improving error reporting for writing to read only registersKrzysztof Parzyszek2017-05-014-0/+25
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301828
* [Hexagon] Give better error messages for solo instruction errorsKrzysztof Parzyszek2017-05-012-0/+15
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301827
* Take indirect branch into account as well when folding.Xin Tong2017-05-011-0/+54
| | | | | | | | We may not be able to rewrite indirect branch target, but we also want to take it into account when folding, i.e. if it and all its successor's predecessors go to the same destination, we can fold, i.e. no need to thread. llvm-svn: 301816
* Use WeakVH instead of WeakTrackingVH in AliasSetTracker's UnkownInstsSanjoy Das2017-05-011-0/+25
| | | | | | | | | | | | | In cases where an instruction (a call site, say) is RAUW'ed with some other value (this is possible via the `returned` attribute, for instance), we want the slot in UnknownInsts to point to the original Instruction we wanted to track, not the value it got replaced by. Fixes PR32587. This relands r301426. llvm-svn: 301814
* [SelectionDAG] Use known ones to provide a better bound for the known zeros ↵Craig Topper2017-05-011-10/+2
| | | | | | | | | | | | | | for CTTZ/CTLZ operations. This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output. I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information. I'll fix CTPOP in a future patch. Differential Revision: https://reviews.llvm.org/D32692 llvm-svn: 301806
* [JumpThread] Do RAUW in case Cond folds to a constant in the CFGXin Tong2017-05-011-0/+57
| | | | | | | | | | | | | | Summary: [JumpThread] Do RAUW in case Cond folds to a constant in the CFG Reviewers: sanjoy Reviewed By: sanjoy Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32407 llvm-svn: 301804
* [InstCombine] add multi-use variants for DeMorgan folds; NFCSanjay Patel2017-05-011-0/+128
| | | | llvm-svn: 301802
* [InstCombine] use FileCheck and auto-generate checks; NFCSanjay Patel2017-05-013-83/+126
| | | | llvm-svn: 301801
* [InstCombine] consolidate more DeMorgan tests; NFCSanjay Patel2017-05-014-29/+56
| | | | llvm-svn: 301800
* Fix test for altmacroMichael Zuckerman2017-05-012-2/+2
| | | | llvm-svn: 301799
* [LLVM][inline-asm] Altmacro absolute expression '%' featureMichael Zuckerman2017-05-012-0/+99
| | | | | | | | | | | | | | | | | | | | | In this patch, I introduce a new alt macro feature. This feature adds meaning for the % when using it as a prefix to the calling macro arguments. In the altmacro mode, the percent sign '%' before an absolute expression convert the expression first to a string. As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html "Expression results as strings You can write `%expr' to evaluate the expression expr and use the result as a string." expression assumptions: 1. '%' can only evaluate an absolute expression. 2. Altmacro '%' must be the first character of the evaluated expression. 3. If no '%' is located before the expression, a regular module operation is expected. 4. The result of Absolute Expressions can be only integer. Differential Revision: https://reviews.llvm.org/D32526 llvm-svn: 301797
* [AVR] Implement non-constant bit rotationsDylan McKay2017-05-011-0/+55
| | | | | | This lets us do bit rotations of variable amount. llvm-svn: 301794
* [GlobalISel][X86] rename test file. NFC.Igor Breger2017-05-011-0/+0
| | | | llvm-svn: 301793
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