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authorSanjay Patel <spatel@rotateright.com>2017-05-02 14:31:30 +0000
committerSanjay Patel <spatel@rotateright.com>2017-05-02 14:31:30 +0000
commit096a98198241c51822d246e3687831fff31700c7 (patch)
tree0dfe76c3df034af9ebe5796b32882d922775b098 /llvm/test
parent106a7eab8494b6cd027eaad2b9dacd5dcc62a5af (diff)
downloadbcm5719-llvm-096a98198241c51822d246e3687831fff31700c7.tar.gz
bcm5719-llvm-096a98198241c51822d246e3687831fff31700c7.zip
[InstCombine] don't use DeMorgan's Law on integer constants
This is the fold that causes the infinite loop in BoringSSL (https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) when we fix instcombine demanded bits to prefer 'not' ops as in D32255. There are 2 or 3 problems with dyn_castNotVal, and I don't think we can reinstate D32255 until dyn_castNotVal is completely eliminated. 1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot. 2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors. 3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y) That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y) Differential Revision: https://reviews.llvm.org/D32665 llvm-svn: 301923
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/Transforms/InstCombine/assume2.ll8
-rw-r--r--llvm/test/Transforms/InstCombine/demorgan.ll12
2 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/Transforms/InstCombine/assume2.ll b/llvm/test/Transforms/InstCombine/assume2.ll
index e8fbc049f41..8dc8831fffa 100644
--- a/llvm/test/Transforms/InstCombine/assume2.ll
+++ b/llvm/test/Transforms/InstCombine/assume2.ll
@@ -21,8 +21,8 @@ define i32 @test1(i32 %a) #0 {
define i32 @test2(i32 %a) #0 {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[A_NOT:%.*]] = or i32 [[A:%.*]], -16
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A_NOT]], -6
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 15
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 10
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: ret i32 2
;
@@ -50,8 +50,8 @@ define i32 @test3(i32 %a) #0 {
define i32 @test4(i32 %a) #0 {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[A_NOT:%.*]] = and i32 [[A:%.*]], 15
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A_NOT]], 10
+; CHECK-NEXT: [[V:%.*]] = or i32 [[A:%.*]], -16
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], -6
; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: ret i32 2
;
diff --git a/llvm/test/Transforms/InstCombine/demorgan.ll b/llvm/test/Transforms/InstCombine/demorgan.ll
index fc4af3c6dad..26c2270a3fd 100644
--- a/llvm/test/Transforms/InstCombine/demorgan.ll
+++ b/llvm/test/Transforms/InstCombine/demorgan.ll
@@ -367,12 +367,12 @@ define i8 @demorgan_nor_use2bc(i8 %A, i8 %B) {
ret i8 %r2
}
-; FIXME: Do not apply DeMorgan's Law to constants. We prefer 'not' ops.
+; Do not apply DeMorgan's Law to constants. We prefer 'not' ops.
define i32 @demorganize_constant1(i32 %a) {
; CHECK-LABEL: @demorganize_constant1(
-; CHECK-NEXT: [[A_NOT:%.*]] = or i32 %a, -16
-; CHECK-NEXT: [[AND1:%.*]] = xor i32 [[A_NOT]], 15
+; CHECK-NEXT: [[AND:%.*]] = and i32 %a, 15
+; CHECK-NEXT: [[AND1:%.*]] = xor i32 [[AND]], -1
; CHECK-NEXT: ret i32 [[AND1]]
;
%and = and i32 %a, 15
@@ -380,12 +380,12 @@ define i32 @demorganize_constant1(i32 %a) {
ret i32 %and1
}
-; FIXME: Do not apply DeMorgan's Law to constants. We prefer 'not' ops.
+; Do not apply DeMorgan's Law to constants. We prefer 'not' ops.
define i32 @demorganize_constant2(i32 %a) {
; CHECK-LABEL: @demorganize_constant2(
-; CHECK-NEXT: [[A_NOT:%.*]] = and i32 %a, -16
-; CHECK-NEXT: [[AND1:%.*]] = xor i32 [[A_NOT]], -16
+; CHECK-NEXT: [[AND:%.*]] = or i32 %a, 15
+; CHECK-NEXT: [[AND1:%.*]] = xor i32 [[AND]], -1
; CHECK-NEXT: ret i32 [[AND1]]
;
%and = or i32 %a, 15
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