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* [WebAssembly] Handle debug information and virtual registers without ↵Dominic Chen2016-08-172-0/+77
| | | | | | | | | | | | | | crashing (reland r278967) Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes. Reviewers: jfb, aprantl, dschuff, echristo Subscribers: llvm-commits, dschuff, jfb, MatzeB, dexonsmith, yurydelendik, mehdi_amini Differential Revision: https://reviews.llvm.org/D23635 llvm-svn: 279011
* SCEV: Don't assert about non-SCEV-able value in isSCEVExprNeverPoison() ↵Hans Wennborg2016-08-171-0/+49
| | | | | | | | (PR28932) Differential Revision: https://reviews.llvm.org/D23594 llvm-svn: 278999
* [InstCombine] add test for missing vector icmp foldSanjay Patel2016-08-171-12/+36
| | | | | | | | Also, add a scalar test to demonstrate one of the intermediate folds that is necessary to accomplish the existing, multi-step test. And simplify the vector tests to only check the final piece of that multi-step transform. llvm-svn: 278995
* [macho2yaml] Don't write empty linkedit dataChris Bieneman2016-08-171-0/+1
| | | | | | | | Since I stopped writing empty export tries it causes LinkEdit to potentially be completely empty which results in invalid yaml being generated. To prevent this we skip linkedit data if it is empty. llvm-svn: 278985
* Revert "[WebAssembly] Handle debug information and virtual registers without ↵Duncan P. N. Exon Smith2016-08-171-75/+0
| | | | | | | | | | crashing" This reverts commit r278967, since the new test is failing when you don't build the WebAssembly target (most people, since it's off-by-default). llvm-svn: 278973
* GlobalISel: support irtranslation of icmp instructions.Tim Northover2016-08-171-0/+12
| | | | llvm-svn: 278969
* [WebAssembly] Handle debug information and virtual registers without crashingDominic Chen2016-08-171-0/+75
| | | | | | | | | | | | Summary: Currently, enabling debug information when compiling for WebAssembly crashes the backend. This commit fixes these by skipping debug values in backend passes. Reviewers: jfb, aprantl, dschuff, echristo Subscribers: mehdi_amini, yurydelendik, dexonsmith, MatzeB, jfb, dschuff, llvm-commits Differential Revision: https://reviews.llvm.org/D21808 llvm-svn: 278967
* [InstCombine] minimize tests and autogenerate checksSanjay Patel2016-08-171-32/+34
| | | | llvm-svn: 278960
* Fix for PR29010Marina Yatsina2016-08-171-0/+12
| | | | | | | | | | | This is a fix for https://llvm.org/bugs/show_bug.cgi?id=29010 Root cause of the bug is that the register class of the machine instruction operand does not fully reflect if this registers that can be allocated. Both for i386 and x86_64 the operand's register class is VR128RegClass and thus contains xmm0-xmm15, though in i386 we can only use xmm0-xmm8. In order to get the actual allocable registers of the class we need to use RegisterClassInfo. Differential Revision: https://reviews.llvm.org/D23613 llvm-svn: 278954
* Move tests to the appropriate subdirectory.Adrian Prantl2016-08-173-0/+0
| | | | llvm-svn: 278948
* [InstCombine] use m_APInt to allow icmp (or X, Y), C folds for splat ↵Sanjay Patel2016-08-172-14/+7
| | | | | | | | | | constant vectors This is a sibling of: https://reviews.llvm.org/rL278859 https://reviews.llvm.org/rL278935 llvm-svn: 278945
* [InstCombine] add tests for missing vector icmp foldsSanjay Patel2016-08-171-0/+30
| | | | llvm-svn: 278943
* Support the DW_AT_noreturn DWARF flag.Adrian Prantl2016-08-174-2/+161
| | | | | | | | | | | This is used to mark functions with the C++11 [[ noreturn ]] or C11 _Noreturn attributes. Patch by Victor Leschuk! https://reviews.llvm.org/D23167 llvm-svn: 278940
* Revert "Reassociate: Reprocess RedoInsts after each inst".Chad Rosier2016-08-173-62/+5
| | | | | | | | This reverts commit r258830, which introduced a bug described in PR28367. PR28367 llvm-svn: 278938
* [InstCombine] use m_APInt to allow icmp (add X, Y), C folds for splat ↵Sanjay Patel2016-08-172-15/+8
| | | | | | | | | constant vectors This is a sibling of: https://reviews.llvm.org/rL278859 llvm-svn: 278935
* [mips] Add l.[sd] and s.[sd] instruction aliasesSimon Dardis2016-08-1714-0/+56
| | | | | | | | Reviewers: dsanders, vkalintiris Differential Review: https://reviews.llvm.org/D23121 llvm-svn: 278930
* Revert "[Reassociate] Avoid iterator invalidation when negating value."Chad Rosier2016-08-171-30/+0
| | | | | | This reverts commit r278928 due to lit test failures. llvm-svn: 278929
* [Reassociate] Avoid iterator invalidation when negating value.Chad Rosier2016-08-171-0/+30
| | | | | | | Differential Revision: https://reviews.llvm.org/D23464 PR28367 llvm-svn: 278928
* [LoopStrenghtReduce] Refactoring and addition of a new target cost function.Jonas Paulsson2016-08-171-0/+117
| | | | | | | | | | | | | | | | | | | | | | | Refactored so that a LSRUse owns its fixups, as oppsed to letting the LSRInstance own them. This makes it easier to rate formulas for LSRUses, since the fixups are available directly. The Offsets vector has been removed since it was no longer necessary. New target hook isFoldableMemAccessOffset(), which is used during formula rating. For SystemZ, this is useful to express that loads and stores with float or vector types with a big/negative offset should be avoided in loops. Without this, LSR will generate a lot of negative offsets that would require extra instructions for loading the address. Updated tests: test/CodeGen/SystemZ/loop-01.ll Reviewed by: Quentin Colombet and Ulrich Weigand. https://reviews.llvm.org/D19152 llvm-svn: 278927
* [AMDGPU] llvm-objdump: Skip amd_kernel_code_t only at the begining of kernel ↵Sam Kolton2016-08-171-0/+8
| | | | | | | | | | | | | | symbol. Summary: This change fix bug in AMDGPU disassembly. Previously, presence of symbols other than kernel symbols caused objdump to skip begining of those symbols. Reviewers: tstellarAMD, vpykhtin, Bigcheese, ruiu Subscribers: kzhuravl, arsenm Differential Revision: http://reviews.llvm.org/D21966 llvm-svn: 278921
* Fix bug in DAGBuilder for getelementptr with expanded vector.Ayman Musa2016-08-171-0/+24
| | | | | | | Replacing the usage of MVT with EVT in case the vector type is expanded. Differential Revision: https://reviews.llvm.org/D23306 llvm-svn: 278913
* [ppc64] Don't apply sibling call optimization if callee has any byval argChuang-Yu Cheng2016-08-171-0/+12
| | | | | | | | | | | | | | | This is a quick work around, because in some cases, e.g. caller's stack size > callee's stack size, we are still able to apply sibling call optimization even callee has any byval arg. This patch fix: https://llvm.org/bugs/show_bug.cgi?id=28328 Reviewers: hfinkel kbarton nemanjai amehsan Subscribers: hans, tjablin https://reviews.llvm.org/D23441 llvm-svn: 278900
* [PM] Port the always inliner to the new pass manager in a much moreChandler Carruth2016-08-171-6/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | minimal and boring form than the old pass manager's version. This pass does the very minimal amount of work necessary to inline functions declared as always-inline. It doesn't support a wide array of things that the legacy pass manager did support, but is alse ... about 20 lines of code. So it has that going for it. Notably things this doesn't support: - Array alloca merging - To support the above, bottom-up inlining with careful history tracking and call graph updates - DCE of the functions that become dead after this inlining. - Inlining through call instructions with the always_inline attribute. Instead, it focuses on inlining functions with that attribute. The first I've omitted because I'm hoping to just turn it off for the primary pass manager. If that doesn't pan out, I can add it here but it will be reasonably expensive to do so. The second should really be handled by running global-dce after the inliner. I don't want to re-implement the non-trivial logic necessary to do comdat-correct DCE of functions. This means the -O0 pipeline will have to be at least 'always-inline,global-dce', but that seems reasonable to me. If others are seriously worried about this I'd like to hear about it and understand why. Again, this is all solveable by factoring that logic into a utility and calling it here, but I'd like to wait to do that until there is a clear reason why the existing pass-based factoring won't work. The final point is a serious one. I can fairly easily add support for this, but it seems both costly and a confusing construct for the use case of the always inliner running at -O0. This attribute can of course still impact the normal inliner easily (although I find that a questionable re-use of the same attribute). I've started a discussion to sort out what semantics we want here and based on that can figure out if it makes sense ta have this complexity at O0 or not. One other advantage of this design is that it should be quite a bit faster due to checking for whether the function is a viable candidate for inlining exactly once per function instead of doing it for each call site. Anyways, hopefully a reasonable starting point for this pass. Differential Revision: https://reviews.llvm.org/D23299 llvm-svn: 278896
* Revert "Write the TPI stream from a PDB to Yaml."Justin Bogner2016-08-167-1110/+0
| | | | | | | | | This is hitting a "use of undeclared identifier 'skipPadding' error locally and on some bots. This reverts r278869. llvm-svn: 278871
* Write the TPI stream from a PDB to Yaml.Zachary Turner2016-08-167-0/+1110
| | | | | | | Reviewed By: ruiu, rnk Differential Revision: https://reviews.llvm.org/D23226 llvm-svn: 278869
* [InstCombine] add tests for fold with no coverage and missing vector foldSanjay Patel2016-08-161-0/+21
| | | | llvm-svn: 278867
* Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough.Kyle Butt2016-08-161-0/+34
| | | | | | | | | | | | If AnalyzeBranch can't analyze a block and it is possible to fallthrough, then duplicating the block doesn't make sense, as only one block can be the layout predecessor for the un-analyzable fallthrough. Submitted wit a test case, but NOTE: the test case doesn't currently fail. However, the test case fails with D20505 and would have saved me some time debugging. llvm-svn: 278866
* [InstCombine] use m_APInt to allow icmp (sub X, Y), C folds for splat ↵Sanjay Patel2016-08-161-6/+4
| | | | | | constant vectors llvm-svn: 278859
* [x86] Allow merging multiple instances of an immediate within a basic block ↵Sanjay Patel2016-08-161-26/+10
| | | | | | | | | | | | | | for code size savings, for 64-bit constants. This patch handles 64-bit constants which can be encoded as 32-bit immediates. It extends the functionality added by https://reviews.llvm.org/D11363 for 32-bit constants to 64-bit constants. Patch by Sunita Marathe! Differential Revision: https://reviews.llvm.org/D23391 llvm-svn: 278857
* Revert "Enhance SCEV to compute the trip count for some loops with unknown ↵Reid Kleckner2016-08-161-54/+0
| | | | | | | | stride." This reverts commit r278731. It caused http://crbug.com/638314 llvm-svn: 278853
* [BranchFolding] Change a test case of r278575.Haicheng Wu2016-08-161-65/+67
| | | | | | Rename the operands to make the test less brittle. llvm-svn: 278841
* [MBP] do not reorder and move up loop latch blockSjoerd Meijer2016-08-161-0/+35
| | | | | | | | | | Do not reorder and move up a loop latch block before a loop header when optimising for size because this will generate an extra unconditional branch. Differential Revision: https://reviews.llvm.org/D22521 llvm-svn: 278840
* Make MDNode::intersect faster than O(n * m)David Majnemer2016-08-162-3/+3
| | | | | | | | It is pretty easy to get it down to O(nlogn + mlogm). This implementation has the added benefit of automatically deduplicating entries between the two sets. llvm-svn: 278837
* Don't passively concatenate MDNodesDavid Majnemer2016-08-161-2/+2
| | | | | | | | | | | I have audited all the callers of concatenate and none require duplicate entries to service concatenation. These duplicates serve no purpose but to needlessly embiggen the IR. N.B. Layering getMostGenericAliasScope on top of concatenate makes it O(nlogn + mlogm) instead of O(n*m). llvm-svn: 278836
* [Coroutines] Part 7: Split coroutine into subfunctionsGor Nishanov2016-08-163-6/+152
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds simple coroutine splitting logic to CoroSplit pass. Documentation and overview is here: http://llvm.org/docs/Coroutines.html. Upstreaming sequence (rough plan) 1.Add documentation. (https://reviews.llvm.org/D22603) 2.Add coroutine intrinsics. (https://reviews.llvm.org/D22659) ... 7. Split coroutine into subfunctions <= we are here 8. Coroutine Frame Building algorithm 9. Handle coroutine with unwinds 10+. The rest of the logic Reviewers: majnemer Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D23461 llvm-svn: 278830
* [mips] Enforce compact branch restrictionsSimon Dardis2016-08-161-0/+28
| | | | | | | | | | | Check both operands for use of the $zero register which cannot be used with a compact branch instruction. Reviewers: dsanders, vkalintris Differential Review: https://reviews.llvm.org/D23547 llvm-svn: 278824
* When the inline spiller rematerializes an instruction, take the debug ↵Wolfgang Pieb2016-08-161-0/+96
| | | | | | | | | | | | location from the instruction that immediately follows the rematerialization point. Patch by Andrea DiBiagio. Differential Revision: http://reviews.llvm.org/D23539 llvm-svn: 278822
* Remove a stale comment from the test, NFC.Wei Mi2016-08-161-1/+0
| | | | llvm-svn: 278821
* [Asan] Unpoison red zones even if use-after-scope was disabled with runtime flagVitaly Buka2016-08-162-4/+8
| | | | | | | | | | | | Summary: PR27453 Reviewers: eugenis Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23481 llvm-svn: 278818
* [AArch64][GlobalISel] Select G_MUL.Ahmed Bougacha2016-08-161-0/+63
| | | | llvm-svn: 278810
* [Pipeliner] Fix an asssert due to invalid Phi in the epilogBrendon Cahoon2016-08-161-0/+44
| | | | | | | | | | | | The pipeliner was generating an invalid Phi name for an operand in the epilog block, which caused an assert in the live variable analysis pass. The fix is to the code that generates new Phis in the epilog block. In this case, there is an existing Phi that needs to be reused rather than creating a new Phi instruction. Differential Revision: https://reviews.llvm.org/D23513 llvm-svn: 278805
* [AArch64][GlobalISel] Select (variable) shifts.Ahmed Bougacha2016-08-161-0/+189
| | | | | | For now, no support for immediates. llvm-svn: 278804
* [AArch64][GlobalISel] Robustize select tests. NFC.Ahmed Bougacha2016-08-161-30/+70
| | | | | | Using the same register means nothing was checking for operand order. llvm-svn: 278803
* [AArch64][GlobalISel] Select p0 G_FRAME_INDEX.Ahmed Bougacha2016-08-161-0/+27
| | | | | | And mark it as legal. llvm-svn: 278802
* [X86][AVX] Fixed typo in zero element insertionSimon Pilgrim2016-08-161-1/+1
| | | | llvm-svn: 278798
* [Hexagon] Improve test to check for @PCREL, only run llc, not opt -> llc.Ron Lieberman2016-08-161-2/+2
| | | | llvm-svn: 278796
* [X86][SSE] Add support for combining v2f64 target shuffles to VZEXT_MOVL ↵Simon Pilgrim2016-08-161-5/+1
| | | | | | | | byte rotations The combine was only matching v2i64 as it assumed lowering to MOVQ - but we have v2f64 patterns that match in a similar fashion llvm-svn: 278794
* [X86][AVX512BW] Updated tests to demonstrate AVX512BW's inability to ↵Simon Pilgrim2016-08-163-2/+3135
| | | | | | vectorize v64i8 shifts llvm-svn: 278790
* Correct the upper bound for a CBZ/CBNZ branch target.Prakhar Bahuguna2016-08-161-1/+13
| | | | | | | | | | | | | Summary: Fix for the upper bound check that was causing a build failure. Reviewers: olista01, rengolin, t.p.northover Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23501 llvm-svn: 278789
* [Thumb] Validate branch target for CBZ/CBNZ instructions.Prakhar Bahuguna2016-08-162-0/+36
| | | | | | | | | | | | | | | | | Summary: The assembler currently does not check the branch target for CBZ/CBNZ instructions, which only permit branching forwards with a positive offset. This adds validation for the branch target to ensure negative PC-relative offsets are not encoded into the instruction, whether specified as a literal or as an assembler symbol. Reviewers: rengolin, t.p.northover Subscribers: llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D23312 llvm-svn: 278788
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