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* Fix disasm of iret, sysexit, and sysret when displayed with Intel syntax.Bill Wendling2012-03-101-0/+22
| | | | | | Patch by Kay Tiong Khoo! llvm-svn: 152487
* Add the missing call to Error when a bad X86 scale expression is parsed.Kevin Enderby2012-03-091-0/+4
| | | | llvm-svn: 152443
* Support reading GNU symbol versions in ELFObjectFileDavid Meyer2012-03-095-0/+56
| | | | | | | | | | * Add enums and structures for GNU version information. * Implement extraction of that information on a per-symbol basis (ELFObjectFile::getSymbolVersion). * Implement a generic interface, GetELFSymbolVersion(), for getting the symbol version from the ObjectFile (hides the templating). * Have llvm-readobj print out the version, when available. * Add a test for the new feature: readobj-elf-versioning.test llvm-svn: 152436
* When identifying exit nodes for the reverse-CFG reverse-post-orderDan Gohman2012-03-092-4/+213
| | | | | | | | | traversal, consider nodes for which the only successors are backedges which the traversal is ignoring to be exit nodes. This fixes a problem where the bottom-up traversal was failing to visit split blocks along split loop backedges. This fixes rdar://10989035. llvm-svn: 152421
* Fix the x86 disassembler to at least print the lock prefix if it is the firstKevin Enderby2012-03-091-0/+5
| | | | | | | prefix. Added a FIXME to remind us this still does not work when it is not the first prefix. llvm-svn: 152414
* test/MC/X86/lit.local.cfg: Fix up to detect 'X86' in targets.NAKAMURA Takumi2012-03-091-0/+11
| | | | llvm-svn: 152406
* Eliminate switch cases that can never match, for example removes allDuncan Sands2012-03-091-1/+100
| | | | | | | negative switch cases if the branch condition is known to be positive. Inspired by a recent improvement to GCC's VRP. llvm-svn: 152405
* Undo a previous restriction on the inline cost calculation which NickChandler Carruth2012-03-091-0/+41
| | | | | | | | | | | | | | | | | | | | | | introduced. Specifically, there are cost reductions for all constant-operand icmp instructions against an alloca, regardless of whether the alloca will in fact be elligible for SROA. That means we don't want to abort the icmp reduction computation when we abort the SROA reduction computation. That in turn frees us from the need to keep a separate worklist and defer the ICmp calculations. Use this new-found freedom and some judicious function boundaries to factor the innards of computing the cost factor of any given instruction out of the loop over the instructions and into static helper functions. This greatly simplifies the code, and hopefully makes it more clear what is happening here. Reviewed by Eric Christopher. There is some concern that we'd like to ensure this doesn't get out of hand, and I plan to benchmark the effects of this change over the next few days along with some further fixes to the inline cost. llvm-svn: 152368
* Fix a regression from r147481.Chad Rosier2012-03-091-0/+12
| | | | | | | | | | | | Original commit message from r147481: DAGCombine for transforming 128->256 casts into a vmovaps, rather then a vxorps + vinsertf128 pair if the original vector came from a load. Fix: Unaligned loads need to generate a vmovups. rdar://10974078 llvm-svn: 152366
* Remove the no longer existent psp triple from a test.Benjamin Kramer2012-03-081-2/+1
| | | | | | | The test fell back to the C backend, making it useless and it started to fail on configurations that don't build the C backend. llvm-svn: 152342
* Test case for r152280, r152285 and r152290.Akira Hatanaka2012-03-081-0/+27
| | | | llvm-svn: 152292
* Use llvm-mc instead of llc. Patch by Jack Carter.Rafael Espindola2012-03-071-5/+5
| | | | llvm-svn: 152242
* Fix infinite loop in nested multiclasses.Jakob Stoklund Olesen2012-03-071-0/+46
| | | | | | Patch by Michael Liao! llvm-svn: 152232
* Add the DW_AT_APPLE_runtime_class attribute to forward declarationsEric Christopher2012-03-071-0/+27
| | | | | | | | as well as completely defined classes. This fixes rdar://10956070 llvm-svn: 152171
* Extend r148086 to check for [r +/- reg] address mode. This fixes queens ↵Evan Cheng2012-03-061-4/+8
| | | | | | performance regression (due to increased register pressure from overly aggressive pre-inc formation). llvm-svn: 152162
* Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.Eli Friedman2012-03-061-13/+21
| | | | llvm-svn: 152136
* Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.Kevin Enderby2012-03-062-0/+14
| | | | llvm-svn: 152127
* Add <imp-def> operands when reloading into physregs.Jakob Stoklund Olesen2012-03-061-0/+1
| | | | | | | | | | When an instruction only writes sub-registers, it is still necessary to add an <imp-def> operand for the super-register. When reloading into a virtual register, rewriting will add the operand, but when loading directly into a virtual register, the <imp-def> operand is still necessary. llvm-svn: 152095
* Split fpscr into two registers: FPSCR and FPSCR_NZCV.Lang Hames2012-03-061-0/+36
| | | | | | | | | The fpscr register contains both flags (set by FP operations/comparisons) and control bits. The control bits (FPSCR) should be reserved, since they're always available and needn't be defined before use. The flag bits (FPSCR_NZCV) should like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165. llvm-svn: 152076
* ARM vpush/vpop assembler mnemonics accept an optional size suffix.Jim Grosbach2012-03-051-0/+15
| | | | | | rdar://10988114 llvm-svn: 152068
* Make sure we don't return bits outside the mask in ComputeMaskedBits. PR12189.Eli Friedman2012-03-051-0/+22
| | | | llvm-svn: 152066
* Remove a test case that no longer makes sense.Jakob Stoklund Olesen2012-03-051-105/+0
| | | | | | | | | | This was testing the handling of sub-register coalescing followed by remat. The original problem was caused by the extra <imp-def> operands added by sub-register coalescing. Those <imp-def> operands are not added any longer, and the test case passes even when the original patch is reverted. llvm-svn: 152040
* updated patch for the ARM fused multiply add/subSebastian Pop2012-03-051-9/+41
| | | | | | | | | | | In this update: - I assumed neon2 does not imply vfpv4, but neon and vfpv4 imply neon2. - I kept setting .fpu=neon-vfpv4 code attribute because that is what the assembler understands. Patch by Ana Pazos <apazos@codeaurora.org> llvm-svn: 152036
* Make aliases for shld and shrd match gas. PR12173.Eli Friedman2012-03-051-6/+11
| | | | llvm-svn: 152014
* Use <def,undef> operands when spilling NEON bundles.Jakob Stoklund Olesen2012-03-041-0/+53
| | | | | | | | | | | MachineOperands that define part of a virtual register must have an <undef> flag if they are not intended as read-modify-write operands. The old trick of adding an <imp-def> operand doesn't work any longer. Fixes PR12177. llvm-svn: 152008
* Nick pointed out on IRC that GVN's propagateEquality wasn't propagatingDuncan Sands2012-03-041-0/+17
| | | | | | | | | | equalities into phi node operands for which the equality is known to hold in the incoming basic block. That's because replaceAllDominatedUsesWith wasn't handling phi nodes correctly in general (that this didn't give wrong results was just luck: the specific way GVN uses replaceAllDominatedUsesWith precluded wrong changes to phi nodes). llvm-svn: 152006
* Do trivial CSE of dead BBs during codegen preparation.Bill Wendling2012-03-044-5/+5
| | | | | | | | Some BBs can become dead after codegen preparation. If we delete them here, it could help enable tail-call optimizations later on. <rdar://problem/10256573> llvm-svn: 152002
* Fix RA-dependent test.Jakob Stoklund Olesen2012-03-031-3/+3
| | | | llvm-svn: 151958
* LVI: Recognize the form instcombine canonicalizes range checks into when ↵Benjamin Kramer2012-03-021-0/+43
| | | | | | | | | | forming constant ranges. This could probably be made a lot smarter, but this is a common case and doesn't require LVI to scan a lot of code. With this change CVP can optimize away the "shift == 0" case in Hashing.h that only gets hit when "shift" is in a range not containing 0. llvm-svn: 151919
* Prevent obscure and incorrect tail-call optimization.Chad Rosier2012-03-021-0/+29
| | | | | | | | | | | | In this instance we are generating the tail-call during legalizeDAG. The 2nd floor call can't be a tail call because it clobbers %xmm1, which is defined by the first floor call. The first floor call can't be a tail-call because it's not in the tail position. The only reasonable way I could think to fix this in a target-independent manner was to check for glue logic on the copy reg. rdar://10930395 llvm-svn: 151877
* Revert "Reorder the sections being output to reduce the number of assembler"Eric Christopher2012-03-021-8/+8
| | | | | | | | | The inline table needs to be constructed ahead of time so that it doesn't try to create new strings while we're emitting everything. This reverts commit a8ff9bccb399183cdd5f1c3cec2bda763664b4b0. llvm-svn: 151864
* Neuter the optimization I implemented with r107852 and r108258 which turn someEvan Cheng2012-03-011-33/+30
| | | | | | | | | | | | floating point equality comparisons into integer ones with -ffast-math. The issue is the optimization causes +0.0 != -0.0. Now the optimization is only done when one side is known to be 0.0. The other side's sign bit is masked off for the comparison. rdar://10964603 llvm-svn: 151861
* Reorder the sections being output to reduce the number of assemblerEric Christopher2012-03-011-8/+8
| | | | | | | | | fixups that are being used to determine section offsets. Reduces the total number of fixups by 50% for a non-trivial testcase. Part of rdar://10413936 llvm-svn: 151852
* [Object]David Meyer2012-03-011-0/+15
| | | | | | Add ObjectFile::getLoadName() for retrieving the soname/installname of a shared object. llvm-svn: 151845
* Change ARMInstPrinter::printPredicateOperand() so it will not abort if itKevin Enderby2012-03-011-0/+18
| | | | | | runs into the undefined 15 condition code value. llvm-svn: 151844
* Fix bugs which were introduced when support for base+index floating point loadsAkira Hatanaka2012-03-012-0/+82
| | | | | | | | | | | and stores was added. - SelectAddr should return false if Parent is an unaligned f32 load or store. - Only aligned load and store nodes should be matched to select reg+imm floating point instructions. - MIPS does not have support for f64 unaligned load or store instructions. llvm-svn: 151843
* Trivial change to make the test use Use –mcpu=generic,Preston Gurd2012-03-012-4/+4
| | | | | | | | so that the test will not fail when run on an Intel Atom processor, due to the Atom scheduler producing an instruction sequence that is different from that which is normally expected. llvm-svn: 151832
* Revert r151816 as Jim has the appropriate fix.Chad Rosier2012-03-012-4/+4
| | | | llvm-svn: 151818
* Fix testcases from r151807.Chad Rosier2012-03-012-4/+4
| | | | llvm-svn: 151816
* Add missing triple for tests.Jim Grosbach2012-03-012-2/+2
| | | | | | Make darwin bots happier. llvm-svn: 151813
* Fix a codegen fault in which log2 or exp2 could be dead-code eliminated even ↵James Molloy2012-03-012-0/+30
| | | | | | | | though they could have sideeffects. Only allow log2/exp2 to be converted to an intrinsic if they are declared "readnone". llvm-svn: 151807
* llvm/test/CMakeLists.txt: Update dependencies to add llvm-readobj to "check".NAKAMURA Takumi2012-03-011-1/+2
| | | | llvm-svn: 151795
* [Object]David Meyer2012-03-014-2/+48
| | | | | | | | | * Add begin_dynamic_table() / end_dynamic_table() private interface to ELFObjectFile. * Add begin_libraries_needed() / end_libraries_needed() interface to ObjectFile, for grabbing the list of needed libraries for a shared object or dynamic executable. * Implement this new interface completely for ELF, leave stubs for COFF and MachO. * Add 'llvm-readobj' tool for dumping ObjectFile information. llvm-svn: 151785
* Don't redundantly copy implicit operands when rematerializing.Lang Hames2012-03-011-0/+58
| | | | | | | While we're at it - don't copy vreg implicit operands while rematerializing. This fixes PR12138. llvm-svn: 151779
* Fix flags for test in MC/MachO/ARM/empty-function-nop.llRichard Trieu2012-03-011-4/+4
| | | | llvm-svn: 151778
* LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" ↵Benjamin Kramer2012-02-291-4/+4
| | | | | | optimization, making the lives of later passes easier. llvm-svn: 151722
* Have GVN also do condition propagation when the right-hand side is notDuncan Sands2012-02-291-0/+57
| | | | | | a constant. This fixes PR1768. llvm-svn: 151713
* Testcase for r151691.Bill Wendling2012-02-291-0/+19
| | | | llvm-svn: 151694
* ARM implement TargetInstrInfo::getNoopForMachoTarget()Jim Grosbach2012-02-281-0/+15
| | | | | | | | | | | | | | Without this hook, functions w/ a completely empty body (including no epilogue) will cause an MCEmitter assertion failure. For example, define internal fastcc void @empty_function() { unreachable } rdar://10947471 llvm-svn: 151673
* In the ObjectFile interface, replace isInternal(), isAbsolute(), isGlobal(), ↵David Meyer2012-02-281-1/+1
| | | | | | and isWeak(), with a bitset of flags. llvm-svn: 151670
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