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* [NFC][X86][MCA] BdVer2: add load-store-throughput testRoman Lebedev2019-06-191-0/+736
* [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsrClement Courbet2019-06-193-7/+7
* [NFC][MCA][X86] Add one more 'clear super register' pattern - movss/movsd loa...Roman Lebedev2019-06-151-0/+112
* [X86] AMD Piledriver (BdVer2): major cleanup (mainly inverse throughput)Roman Lebedev2019-05-0976-6225/+6230
* [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly prin...Craig Topper2019-05-064-24/+24
* [llvm-mca][x86] Fix MMX PMOVMSKB testSimon Pilgrim2019-04-291-3/+3
* [X86] Make _Int instructions the preferred instructon for the assembly parser...Craig Topper2019-04-101-6/+6
* [llvm-mca][scheduler-stats] Print issued micro opcodes per cycle. NFCIAndrea Di Biagio2019-04-083-17/+17
* [X86] AMD Piledriver (BdVer2): fine-tune some latenciesRoman Lebedev2019-03-2812-197/+197
* [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of cust...Craig Topper2019-03-183-40/+40
* [X86] Remove the _alt forms of XOP VPCOM instructions. Use a combination of c...Craig Topper2019-03-171-32/+32
* [llvm-mca][X86] Add ADC/SBB with zero test casesSimon Pilgrim2019-03-061-1/+73
* [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two argum...Craig Topper2019-02-041-44/+44
* [X86] Print %st(0) as %st when its implicit to the instruction. Continue prin...Craig Topper2019-02-041-42/+42
* Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses a...Craig Topper2019-02-041-54/+54
* [X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber na...Craig Topper2019-02-031-54/+54
* [X86][BdVer2] Transfer delays from the integer to the floating point unit.Roman Lebedev2019-02-017-46/+46
* [NFC][MCA][X86][BdVer2] Cherry-pick int-to-ivec forwarding tests from BtVer2Roman Lebedev2019-01-273-0/+705
* [llvm-mca][X86] Add missing CLWB/CLZERO/FSGSBASE/LWP/MWAITX/RDPID/SHA testsSimon Pilgrim2019-01-221-0/+86
* [llvm-mca][X86] Add missing enter/leave, invlpg/invlpga, rdmsr/wrmsr, rdpmc a...Simon Pilgrim2019-01-221-1/+33
* [llvm-mca][X86] Add missing mfence/pinsrw testsSimon Pilgrim2019-01-221-1/+12
* [llvm-mca][X86] Add missing monitor/mwait testsSimon Pilgrim2019-01-221-1/+9
* [llvm-mca][X86] Add missing tzcntw testsSimon Pilgrim2019-01-221-1/+8
* [llvm-mca][MC] Add the ability to declare which processor resources model loa...Andrea Di Biagio2018-11-292-89/+89
* [llvm-mca] pass -dispatch-stats flag to a couple of tests. NFCAndrea Di Biagio2018-11-272-2/+202
* [llvm-mca][View] Improved Retire Control Unit Statistics.Andrea Di Biagio2018-11-231-0/+4
* [llvm-mca] Correctly update the resource strategy for processor resources wit...Andrea Di Biagio2018-11-1221-125/+125
* [X86][BdVer2] Fix loads/stores throughput for Piledriver (PR39465)Roman Lebedev2018-11-1065-3806/+4046
* [NFC][BdVer2] Load and store throughput tests: also check sched stats (PR39465)Roman Lebedev2018-11-082-2/+240
* [NFC][BdVer2] Tests for load and store throughput (PR39465)Roman Lebedev2018-11-082-0/+1209
* AMD BdVer2 (Piledriver) Initial Scheduler modelRoman Lebedev2018-10-2778-8414/+9341
* [NFC][X86] Baseline tests for AMD BdVer2 (Piledriver) Scheduler modelRoman Lebedev2018-10-2778-0/+15689
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