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path: root/llvm/test/Transforms/LoopVectorize/AArch64
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* Reapply "[LV] Enable vectorization of loops with conditional stores by default"Matthew Simpson2016-12-161-1/+1
* Revert r289863: [LV] Enable vectorization of loops with conditionalChandler Carruth2016-12-161-1/+1
* [LV] Enable vectorization of loops with conditional stores by defaultMatthew Simpson2016-12-151-1/+1
* [LV] Scalarize operands of predicated instructionsMatthew Simpson2016-12-072-2/+209
* Second attempt at r285517.Dorit Nuzman2016-10-311-1/+1
* Revert r285517 due to build failures.Dorit Nuzman2016-10-301-1/+1
* [LoopVectorize] Make interleaved-accesses analysis less conservative aboutDorit Nuzman2016-10-301-1/+1
* [LV] Correct misleading comments in test (NFC)Matthew Simpson2016-10-281-9/+5
* [LV] Account for predicated stores in instruction costsMatthew Simpson2016-10-131-1/+39
* [LV] Avoid rounding errors for predicated instruction costsMatthew Simpson2016-10-131-0/+53
* [LV] Move insertelement sequence after scalar definitionsMatthew Simpson2016-08-291-0/+42
* [LV] Unify vector and scalar mapsMatthew Simpson2016-08-241-2/+2
* Reapply "[TTI] Refine default cost for interleaved load groups with gaps"Matthew Simpson2016-06-101-0/+42
* Revert "[TTI] Refine default cost for interleaved load groups with gaps"Matthew Simpson2016-06-101-42/+0
* [TTI] Refine default cost for interleaved load groups with gapsMatthew Simpson2016-06-101-0/+42
* [LAA] Rename forwarding conflict detection option (NFC)Matthew Simpson2016-05-161-1/+1
* [LV] Ensure safe VF for loops with interleaved accessesMatthew Simpson2016-05-161-0/+56
* Revert "[VectorUtils] Query number of sign bits to allow more truncations"James Molloy2016-05-101-36/+0
* [VectorUtils] Query number of sign bits to allow more truncationsJames Molloy2016-05-091-0/+36
* [LoopUtils, LV] Fix PR27246 (first-order recurrences)Matthew Simpson2016-04-111-0/+41
* Re-commit [SCEV] Introduce a guarded backedge taken count and use it in LAA a...Silviu Baranga2016-04-081-0/+166
* Revert r265535 until we know how we can fix the bots Silviu Baranga2016-04-061-166/+0
* [SCEV] Introduce a guarded backedge taken count and use it in LAA and LVSilviu Baranga2016-04-061-0/+166
* [VectorUtils] Don't try and truncate PHIs to a smaller bitwidthJames Molloy2016-03-301-0/+58
* [LoopUtils, LV] Fix PR26734Matthew Simpson2016-03-031-0/+49
* [LV] Vectorize first-order recurrencesMatthew Simpson2016-02-191-0/+209
* [LV] Add support for insertelt/extractelt processing during type truncationSilviu Baranga2016-02-151-0/+47
* [DemandedBits] Revert r249687 due to PR26071James Molloy2016-02-031-34/+0
* [LoopVectorize] Use MapVector rather than DenseMap for MinBWs.Charlie Turner2015-11-261-0/+54
* [LoopVectorize] Address post-commit feedback on r250032James Molloy2015-11-091-1/+1
* [LoopVectorize] Shrink integer operations into the smallest type possibleJames Molloy2015-10-121-0/+243
* [LV] Relax Small Size Reduction Type RequirementMatthew Simpson2015-09-101-3/+66
* [AArch64] Turn on by default interleaved access vectorizationSilviu Baranga2015-09-012-3/+3
* [LoopVectorize] Move test from r246149 into a target-specific folder to appea...Chad Rosier2015-08-271-0/+128
* The tests added in r243270 require asserts to be enabledSilviu Baranga2015-07-271-1/+1
* Fix the tests added in r243270. Use 2>&1 instead of |&Silviu Baranga2015-07-271-1/+1
* [ARM/AArch64] Fix cost model for interleaved accessesSilviu Baranga2015-07-271-0/+39
* [LoopVectorize] Teach Loop Vectorizor about interleaved memory accesses.Hao Liu2015-06-081-20/+17
* [opaque pointer type] Add textual IR support for explicit type parameter to l...David Blaikie2015-02-275-31/+31
* [opaque pointer type] Add textual IR support for explicit type parameter to g...David Blaikie2015-02-275-19/+19
* Move the target specific test case arbitrary-induction-step.ll to test/Transf...Hao Liu2015-01-301-0/+150
* Addition to r216371 (SLP and Loop Vectorization) and r218607 whereSuyog Sarda2014-11-111-0/+31
* Reduce verbiage of lit.local.cfg filesAlp Toker2014-06-091-2/+1
* Use AArch64 instead of now removed ARM64 in test configsAlexey Samsonov2014-06-051-1/+1
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-242-0/+127
* AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.Tim Northover2014-05-241-1/+1
* [Test] Trim unnecessary .c and .cpp from config.suffix in lit.local.cfgAdam Nemet2014-05-121-1/+1
* Add missing config file for newly added test case introduced by r206563.Jiangning Liu2014-04-181-0/+6
* This commit allows vectorized loops to be unrolled by a factor of 2 for AArch64.Jiangning Liu2014-04-181-0/+42
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