summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/LoopStrengthReduce
Commit message (Expand)AuthorAgeFilesLines
...
* LSR: Check more intrinsic pointer operandsMatt Arsenault2017-12-111-1/+81
* Revert "[X86] Improvement in CodeGen instruction selection for LEAs."Matt Morehouse2017-12-011-3/+3
* [X86] Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja2017-12-011-3/+3
* Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (...Hans Wennborg2017-10-041-3/+3
* [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post...Jatin Bhateja2017-10-041-3/+3
* Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection ...Hans Wennborg2017-09-151-3/+3
* [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja2017-09-151-3/+3
* [LSR] Fix Shadow IV in case of integer overflowMax Kazantsev2017-08-291-0/+94
* [NFC] Fix indents in testMax Kazantsev2017-08-291-1/+1
* [NFC] Refactor ShadowIV test to use FileCheckMax Kazantsev2017-08-291-27/+45
* [ARM, Thumb1] Prevent ARMTargetLowering::isLegalAddressingMode from accepting...Evgeny Astigeevich2017-08-241-0/+122
* Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).Evgeny Stupachenko2017-08-076-22/+26
* [SCEV] Preserve NSW information for sext(subtract).Amara Emerson2017-08-041-2/+1
* Fix PR33514Evgeny Stupachenko2017-08-041-1/+2
* Remove the obsolete offset parameter from @llvm.dbg.valueAdrian Prantl2017-07-281-2/+2
* [LSR] Narrow search space by filtering non-optimal formulae with the same Sca...Wei Mi2017-07-062-2/+62
* Revert r304824 "Fix PR23384 (part 3 of 3)"Hans Wennborg2017-06-196-26/+22
* [SCEV] Teach SCEVExpander to expand BinPowMax Kazantsev2017-06-191-0/+264
* Fix PR23384 (part 3 of 3)Evgeny Stupachenko2017-06-066-22/+26
* [X86] Replace 'REQUIRES: x86' in tests with 'REQUIRES: x86-registered-target'...Craig Topper2017-06-041-1/+1
* [SCEVExpander] Try harder to avoid introducing inttoptrKeno Fischer2017-05-271-0/+45
* Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"Max Kazantsev2017-05-263-14/+28
* Revert "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"Diana Picus2017-05-243-19/+14
* [SCEV] Do not fold dominated SCEVUnknown into AddRecExpr startMax Kazantsev2017-05-243-14/+19
* [LSR] Call canonicalize after we generate a new Formula in GenerateTruncates....Wei Mi2017-05-181-0/+36
* ARM: handle post-indexed NEON ops where the offset isn't the access width.Tim Northover2017-04-201-5/+3
* Turn on -addr-sink-using-gep by default.Eli Friedman2017-04-062-3/+0
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-215-12/+12
* Set option enabling LSR alternative way to resolve complex solution to false.Evgeny Stupachenko2017-03-042-2/+2
* [LSR] Canonicalize formula and put recursive Reg related with current loop in...Wei Mi2017-02-221-0/+65
* The patch introduces new way of narrowing complex (>UINT16 variants) solutions.Evgeny Stupachenko2017-02-212-2/+2
* [LSR] Prevent formula with SCEVAddRecExpr type of Reg from Sibling loopsWei Mi2017-02-161-0/+97
* [LSR] Pointers with different address spaces are considered incompatible.Mikael Holmen2017-02-141-0/+31
* The patch fixes r294821Evgeny Stupachenko2017-02-112-6/+6
* Fix PR23384 (under "-lsr-insns-cost" option)Evgeny Stupachenko2017-02-112-0/+110
* [LSR] Recommit: Allow formula containing Reg for SCEVAddRecExpr related with ...Wei Mi2017-02-111-0/+65
* LSR: Check atomic instruction pointer operandsMatt Arsenault2017-02-081-0/+87
* LSR: Don't drop address space when type doesn't matchMatt Arsenault2017-01-301-0/+54
* This test apparently requires an x86 target and is failing on numerousChandler Carruth2017-01-231-0/+48
* [PM] Clean up the testing for IVUsers, especially with the new PM.Chandler Carruth2017-01-151-54/+0
* [LoopStrengthReduce] Don't bother rewriting PHIs in catchswitch blocksDavid Majnemer2017-01-131-0/+58
* Revert r286999 which caused buildbot test failures. Some testcases need to be...Wei Mi2016-11-151-65/+0
* [LSR] Allow formula containing Reg for SCEVAddRecExpr related with outerloop.Wei Mi2016-11-151-0/+65
* [ARM] Loop Strength Reduction crashes when targeting ARM or Thumb.Alexandros Lamprineas2016-11-091-0/+35
* Fix testcases failing after r284036Krzysztof Parzyszek2016-10-121-3/+1
* Do not remove implicit defs in BranchFolderKrzysztof Parzyszek2016-10-121-0/+1
* [LSR] Don't try and create post-inc expressions on non-rotated loopsJames Molloy2016-08-151-0/+43
* [SCEV] Update interface to handle SCEVExpander insert point motion.Geoff Berry2016-08-111-0/+47
* [PM] Significantly refactor the pass pipeline parsing to be easier toChandler Carruth2016-08-031-1/+1
* [PM] Convert Loop Strength Reduce pass to new PMDehao Chen2016-07-181-0/+1
OpenPOWER on IntegriCloud