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path: root/llvm/test/Transforms/LoopStrengthReduce
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* AMDGPU: Fix some outdated datalayouts in testsMatt Arsenault2018-09-134-4/+4
* [LSR] Add tests for small constants; NFCGil Rapaport2018-09-101-0/+151
* SCEVExpander::expandAddRecExprLiterally(): check before casting as InstructionRoman Lebedev2018-06-291-0/+43
* Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnly...Alina Sbirlea2018-06-202-2/+3
* reapply r334209 with fixes for harfbuzz in ChromiumDaniil Fukalov2018-06-081-1/+42
* Revert r334209 "[LSR] Check yet more intrinsic pointer operands"Reid Kleckner2018-06-081-42/+1
* [LSR] Check yet more intrinsic pointer operandsDaniil Fukalov2018-06-071-1/+42
* [AMDGPU] Move lsr test. NFC.Stanislav Mekhanoshin2018-05-171-0/+37
* Fix LSR compile time hang.Evgeny Stupachenko2018-05-161-0/+1336
* Revert "[PowerPC] LSR tunings for PowerPC"Stefan Pintilie2018-03-091-57/+0
* Revert "[PowerPC] Move test to correct location."Stefan Pintilie2018-03-091-0/+57
* [PowerPC] Move test to correct location.Stefan Pintilie2018-03-071-57/+0
* [PowerPC] LSR tunings for PowerPCStefan Pintilie2018-03-071-0/+57
* [LoopStrengthReduce, x86] don't add cost for a cmp that will be macro-fused (...Sanjay Patel2018-02-052-35/+32
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-3/+2
* [LSR] Don't force bases of foldable formulae to the final type.Mikael Holmen2018-02-012-42/+34
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-2/+2
* [LoopStrengthReduce] add test to show potential macro-fusion-based diff (PR35...Sanjay Patel2018-01-301-0/+126
* [x86] auto-generate complete checks; NFCSanjay Patel2018-01-263-93/+443
* [SCEV] Do not cache S -> V if S is not equivalent of VSerguei Katkov2018-01-091-2/+3
* LSR: Check more intrinsic pointer operandsMatt Arsenault2017-12-111-1/+81
* Revert "[X86] Improvement in CodeGen instruction selection for LEAs."Matt Morehouse2017-12-011-3/+3
* [X86] Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja2017-12-011-3/+3
* Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (...Hans Wennborg2017-10-041-3/+3
* [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post...Jatin Bhateja2017-10-041-3/+3
* Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection ...Hans Wennborg2017-09-151-3/+3
* [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja2017-09-151-3/+3
* [LSR] Fix Shadow IV in case of integer overflowMax Kazantsev2017-08-291-0/+94
* [NFC] Fix indents in testMax Kazantsev2017-08-291-1/+1
* [NFC] Refactor ShadowIV test to use FileCheckMax Kazantsev2017-08-291-27/+45
* [ARM, Thumb1] Prevent ARMTargetLowering::isLegalAddressingMode from accepting...Evgeny Astigeevich2017-08-241-0/+122
* Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).Evgeny Stupachenko2017-08-076-22/+26
* [SCEV] Preserve NSW information for sext(subtract).Amara Emerson2017-08-041-2/+1
* Fix PR33514Evgeny Stupachenko2017-08-041-1/+2
* Remove the obsolete offset parameter from @llvm.dbg.valueAdrian Prantl2017-07-281-2/+2
* [LSR] Narrow search space by filtering non-optimal formulae with the same Sca...Wei Mi2017-07-062-2/+62
* Revert r304824 "Fix PR23384 (part 3 of 3)"Hans Wennborg2017-06-196-26/+22
* [SCEV] Teach SCEVExpander to expand BinPowMax Kazantsev2017-06-191-0/+264
* Fix PR23384 (part 3 of 3)Evgeny Stupachenko2017-06-066-22/+26
* [X86] Replace 'REQUIRES: x86' in tests with 'REQUIRES: x86-registered-target'...Craig Topper2017-06-041-1/+1
* [SCEVExpander] Try harder to avoid introducing inttoptrKeno Fischer2017-05-271-0/+45
* Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"Max Kazantsev2017-05-263-14/+28
* Revert "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"Diana Picus2017-05-243-19/+14
* [SCEV] Do not fold dominated SCEVUnknown into AddRecExpr startMax Kazantsev2017-05-243-14/+19
* [LSR] Call canonicalize after we generate a new Formula in GenerateTruncates....Wei Mi2017-05-181-0/+36
* ARM: handle post-indexed NEON ops where the offset isn't the access width.Tim Northover2017-04-201-5/+3
* Turn on -addr-sink-using-gep by default.Eli Friedman2017-04-062-3/+0
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-215-12/+12
* Set option enabling LSR alternative way to resolve complex solution to false.Evgeny Stupachenko2017-03-042-2/+2
* [LSR] Canonicalize formula and put recursive Reg related with current loop in...Wei Mi2017-02-221-0/+65
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