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* Revert "Temporarily Revert "Add basic loop fusion pass.""Eric Christopher2019-04-171-0/+210
| | | | | | | | The reversion apparently deleted the test/Transforms directory. Will be re-reverting again. llvm-svn: 358552
* Temporarily Revert "Add basic loop fusion pass."Eric Christopher2019-04-171-210/+0
| | | | | | | | As it's causing some bot failures (and per request from kbarton). This reverts commit r358543/ab70da07286e618016e78247e4a24fcb84077fda. llvm-svn: 358546
* [PM] Port LoadStoreVectorizer to the new pass manager.Markus Lavin2018-12-071-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D54848 llvm-svn: 348570
* LSV: Fix adjust alloca alignment trick for AMDGPUMatt Arsenault2018-09-181-5/+81
| | | | | | | | | | This was checking the hardcoded address space 0 for the stack. Additionally, this should be checking for legality with the adjusted alignment, so defer the alignment check. Also try to split if the unaligned access isn't allowed. llvm-svn: 342442
* AMDGPU: Fix some outdated datalayouts in testsMatt Arsenault2018-09-131-2/+3
| | | | llvm-svn: 342131
* [AMDGPU] Switch to the new addr space mapping by defaultYaxun Liu2018-02-021-58/+57
| | | | | | | | This requires corresponding clang change. Differential Revision: https://reviews.llvm.org/D40955 llvm-svn: 324101
* AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernelMatt Arsenault2017-03-211-7/+7
| | | | | | | | | | | | Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
* LoadStoreVectorizer: Split even sized illegal chains properlyMatt Arsenault2017-02-231-1/+4
| | | | | | | | | | | | | | | | | | | | Implement isLegalToVectorizeLoadChain for AMDGPU to avoid producing private address spaces accesses that will need to be split up later. This was doing the wrong thing in the case where the queried chain was an even number of elements. A possible <4 x i32> store was being split into store <2 x i32> store i32 store i32 rather than store <2 x i32> store <2 x i32> when legal. llvm-svn: 295933
* AMDGPU/SI: Don't allow unaligned scratch accessTom Stellard2016-10-141-1/+1
| | | | | | | | | | | | Summary: The hardware doesn't support this. Reviewers: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye Differential Revision: https://reviews.llvm.org/D25523 llvm-svn: 284257
* LSV: Fix incorrectly increasing alignmentMatt Arsenault2016-09-091-0/+129
If the unaligned access has a dynamic offset, it may be odd which would make the adjusted alignment incorrect to use. llvm-svn: 281110
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