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* [NFC][InstCombine] More tests for PR42563 "Dropping pointless masking before ↵Roman Lebedev2019-09-181-23/+0
| | | | | | | | | | left shift" For patterns c/d/e we too can deal with the pattern even if we can't just drop the mask, we can just apply it afterwars: https://rise4fun.com/Alive/gslRa llvm-svn: 372244
* [NFC][InstCombine] Redundant masking before left-shift: tests with assumeRoman Lebedev2019-07-191-6/+36
| | | | | | | | | | | | | | If the legality check is `(shiftNbits-maskNbits) s>= 0`, then we can simplify it to `shiftNbits u>= maskNbits`, which is easier to check for. However, currently switching the `dropRedundantMaskingOfLeftShiftInput()` to `SimplifyICmpInst()` does not catch these cases and regresses currently-handled cases, so i'll leave it as is for now. https://rise4fun.com/Alive/25P llvm-svn: 366564
* [InstCombine] Dropping redundant masking before left-shift [3/5] (PR42563)Roman Lebedev2019-07-191-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: If we have some pattern that leaves only some low bits set, and then performs left-shift of those bits, if none of the bits that are left after the final shift are modified by the mask, we can omit the mask. There are many variants to this pattern: d. `(x & ((-1 << MaskShAmt) >> MaskShAmt)) << ShiftShAmt` All these patterns can be simplified to just: `x << ShiftShAmt` iff: d. `(ShiftShAmt-MaskShAmt) s>= 0` (i.e. `ShiftShAmt u>= MaskShAmt`) alive proofs: d: https://rise4fun.com/Alive/I5Y For now let's start with patterns where both shift amounts are variable, with trivial constant "offset" between them, since i believe this is both simplest to handle and i think this is most common. But again, there are likely other variants where we could use ValueTracking/ConstantRange to handle more cases. https://bugs.llvm.org/show_bug.cgi?id=42563 Differential Revision: https://reviews.llvm.org/D64519 llvm-svn: 366538
* [NFC][InstCombine] Comb through just-added "omit mask before left-shift" ↵Roman Lebedev2019-07-101-35/+57
| | | | | | tests once more llvm-svn: 365694
* [NFC][InstCombine] Redundant masking before left-shift (PR42563)Roman Lebedev2019-07-101-0/+334
alive proofs: a,b: https://rise4fun.com/Alive/4zsf c,d,e,f: https://rise4fun.com/Alive/RC49 Indeed, not all of these patterns are canonical. But since this fold will only produce a single instruction i'm really interested in handling even uncanonical patterns. Other than these 6 patterns, i can't think of any other reasonable variants right now, although i'm sure they exist. For now let's start with patterns where both shift amounts are variable, with trivial constant "offset" between them, since i believe this is both simplest to handle and i think this is most common. But again, there are likely other variants where we could use ValueTracking/ConstantRange to handle more cases. https://bugs.llvm.org/show_bug.cgi?id=42563 llvm-svn: 365641
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