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* [AArch64] Add command-line option for SBDiogo N. Sampaio2018-12-283-13/+13
| | | | | | | | | | | | | | | SB (Speculative Barrier) is only mandatory from 8.5 onwards but is optional from Armv8.0-A. This patch adds a command line option to enable SB, as it was previously only possible to enable by selecting -march=armv8.5-a. This patch also moves to FeatureSB the old FeatureSpecRestrict. Reviewers: pbarrio, olista01, t.p.northover, LukeCheeseman Differential Revision: https://reviews.llvm.org/D55921 llvm-svn: 350126
* [WebAssembly] Added basic support for if/else/end_if in MC layer.Wouter van Oortmerssen2018-12-261-10/+10
| | | | | | | | | | | | | | | | | Summary: These instructions are currently unused in our backend, but for completeness it is good to support them, so they can be used with the assembler in hand-written code. Tests are very basic, signature support missing much like other blocks. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55973 llvm-svn: 350079
* [WebAssembly] Make assembler check for proper nesting of control flow.Wouter van Oortmerssen2018-12-263-0/+38
| | | | | | | | | | | | | | | | | | | | | Summary: It does so using a simple nesting stack, and gives clear errors upon violation. This is unique to wasm, since most CPUs do not have any nested constructs. Had to add an end of file check to the general assembler for this. Note: if/else/end instructions are not currently supported in our tablegen defs, so these tests will be enabled in a follow-up. They already pass the nesting check. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55797 llvm-svn: 350078
* [MC] Enable .file support on COFF and diagnose it on unsupported targetsReid Kleckner2018-12-212-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The "single parameter" .file directive appears to be an ELF-only feature that is intended to insert the main source filename into the string table table. I noticed that if you assemble an ELF .s file for COFF, typically it will assert right away on a .file directive near the top of the file. My first change was to make this emit a proper error in the asm parser so that we don't assert so easily. However, COFF actually does have some support for this directive, and if you emit an object file, llvm-mc does not assert. When emitting a COFF object, MC will take those file names and create "debug" symbol table entries for them. I'm not familiar with these kinds of symbol table entries, and I'm not aware of any users of them, but @compnerd added them a while ago. They don't introduce absolute paths, and most main source file paths are short enough that this extra entry shouldn't cause any problems, so I enabled the flag in MCAsmInfoCOFF that indicates that it's supported. This has the side effect of adding an extra debug symbol to every object produced by clang, which is a pretty big functional change. My question is, should we keep the functionality or remove it in the name of symbol table minimalism? Reviewers: mstorsjo, compnerd Subscribers: hiraditya, compnerd, llvm-commits Differential Revision: https://reviews.llvm.org/D55900 llvm-svn: 349976
* [AArch64] Adding missing REQUIRES in aarch64 dwarf testLuke Cheeseman2018-12-211-0/+1
| | | | llvm-svn: 349900
* [Dwarf/AArch64] Return address signing B key dwarf supportLuke Cheeseman2018-12-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | - When signing return addresses with -msign-return-address=<scope>{+<key>}, either the A key instructions or the B key instructions can be used. To correctly authenticate the return address, the unwinder/debugger must know which key was used to sign the return address. - When and exception is thrown or a break point reached, it may be necessary to unwind the stack. To accomplish this, the unwinder/debugger must be able to first authenticate an the return address if it has been signed. - To enable this, the augmentation string of CIEs has been extended to allow inclusion of a 'B' character. Functions that are signed using the B key variant of the instructions should have and FDE whose associated CIE has a 'B' in the augmentation string. - One must also be able to preserve these semantics when first stepping from a high level language into assembly and then, as a second step, into an object file. To achieve this, I have introduced a new assembly directive '.cfi_b_key_frame ', that tells the assembler the current frame uses return address signing with the B key. - This ensures that the FDE is associated with a CIE that has 'B' in the augmentation string. Differential Revision: https://reviews.llvm.org/D51798 llvm-svn: 349895
* [MC] [AArch64] Correctly resolve ":abs_g1:3" etc.Eli Friedman2018-12-201-11/+30
| | | | | | | | | | | We have to treat constructs like this as if they were "symbolic", to use the correct codepath to resolve them. This mostly only affects movz etc. because the other uses of classifySymbolRef conservatively treat everything that isn't a constant as if it were a symbol. Differential Revision: https://reviews.llvm.org/D55906 llvm-svn: 349800
* [MC] [AArch64] Support resolving fixups for abs_g0 etc.Eli Friedman2018-12-202-0/+36
| | | | | | | | | | | | | | | | | | | This requires a bit more code than other fixups, to distingush between abs_g0/abs_g1/etc. Actually, I think some of the other fixups are missing some checks, but I won't try to address that here. I haven't seen any real-world code that uses a construct like this, but it clearly should work, and we're considering using it in the implementation of localescape/localrecover on Windows (see https://reviews.llvm.org/D53540). I've verified that binutils produces the same code as llvm-mc for the testcase. This currently doesn't include support for the *_s variants (that requires a bit more work to set the opcode). Differential Revision: https://reviews.llvm.org/D55896 llvm-svn: 349799
* [RISCV] Properly evaluate fixup_riscv_pcrel_lo12Alex Bradbury2018-12-203-20/+27
| | | | | | | | | | | | | | | | | | | | This is a update to D43157 to correctly handle fixup_riscv_pcrel_lo12. Notable changes: Rebased onto trunk Handle and test S-type Test case pcrel-hilo.s is merged into relocations.s D43157 description: VK_RISCV_PCREL_LO has to be handled specially. The MCExpr inside is actually the location of an auipc instruction with a VK_RISCV_PCREL_HI fixup pointing to the real target. Differential Revision: https://reviews.llvm.org/D54029 Patch by Chih-Mao Chen and Michael Spencer. llvm-svn: 349764
* Fix test MC/AMDGPU/reloc.sNicolai Haehnle2018-12-191-2/+2
| | | | | | | Missed this change in r349620 Change-Id: I5123e31ed4bb99ad6903b9ede4de4dbe2cc6d453 llvm-svn: 349622
* [AArch64] Avoid crashing on .seh directives in assemblyMartin Storsjo2018-12-181-0/+84
| | | | | | Differential Revision: https://reviews.llvm.org/D55670 llvm-svn: 349549
* [WebAssembly] Fix assembler parsing of br_table.Wouter van Oortmerssen2018-12-171-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We use `variable_ops` in the tablegen defs to denote the list of branch targets in `br_table`, but unlike other uses of `variable_ops` (e.g. call) the these branch targets need to actually be encoded in the instruction. The existing tables for `variable_ops` cause not operands to be accepted by the assembly matcher. Following the example of ARM: https://github.com/llvm-mirror/llvm/blob/2cc0a7da876c1d8c32775b0119e1e15aaa759b9e/lib/Target/ARM/ARMInstrInfo.td#L550-L555 we introduce a new operand type to capture this list, and we use the same {} syntax as ARM as well to differentiate them from regular integer operands. Also removed definition and use of TSFlags in tablegen defs, since `br_table` now has a non-variable_ops immediate operand, so the previous logic of only the variable_ops arguments being labels didn't make sense anymore. Reviewers: dschuff, aheejin, sunfish Subscribers: javed.absar, sbc100, jgravelle-google, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D55401 llvm-svn: 349405
* [codeview] Flush labels before S_DEFRANGE* fragmentsReid Kleckner2018-12-171-0/+161
| | | | | | | | | | | | | This was a pre-existing bug that could be triggered with assembly like this: .p2align 2 .LtmpN: .cv_def_range "..." I noticed this when attempting to change clang to emit aligned symbol records. llvm-svn: 349403
* AsmParser: test .double NaN and .double infJF Bastien2018-12-171-0/+9
| | | | | | | | | | | | | | | | Summary: It looks like this support was added to match GNU AS, but only tests .float and not .double. I asked RedHat folks to confirm that 0x7fffffffffffffff was indeed the right value for NaN. Same for infinity, but it only has positive / negative encodings. Reviewers: scanon, rjmccall Subscribers: jkorous, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D55531 llvm-svn: 349376
* [mips] Fix test typo in rL348914Fangrui Song2018-12-151-1/+1
| | | | | | RUN; -> RUN: llvm-svn: 349258
* [macho] save the SDK version stored in module metadata into the version min andAlex Lorenz2018-12-146-0/+85
| | | | | | | | | | | | | | | | | | | | | build version load commands in the object file This commit introduces a new metadata node called "SDK Version". It will be set by the frontend to mark the platform SDK (macOS/iOS/etc) version which was used during that particular compilation. This node is used when machine code is emitted, by either saving the SDK version into the appropriate macho load command (version min/build version), or by emitting the assembly for these load commands with the SDK version specified as well. The assembly for both load commands is extended by allowing it to contain the sdk_version X, Y [, Z] trailing directive to represent the SDK version respectively. rdar://45774000 Differential Revision: https://reviews.llvm.org/D55612 llvm-svn: 349119
* [MachO][TLOF] Add support for local symbols in the indirect symbol tableFrancis Visoiu Mistrih2018-12-131-0/+21
| | | | | | | | | | | | On 32-bit archs, before, we would assume that an indirect symbol will never have local linkage. This can lead to miscompiles where the symbol's value would be 0 and the linker would use that value, because the indirect symbol table would contain the value `INDIRECT_SYMBOL_LOCAL` for that specific symbol. Differential Revision: https://reviews.llvm.org/D55573 llvm-svn: 349060
* [Sparc] Add membar assembler tagsDaniel Cederman2018-12-133-4/+36
| | | | | | | | | | | | | | | | | Summary: The Sparc V9 membar instruction can enforce different types of memory orderings depending on the value in its immediate field. In the architectural manual the type is selected by combining different assembler tags into a mask. This patch adds support for these tags. Reviewers: jyknight, venkatra, brad Reviewed By: jyknight Subscribers: fedor.sergeev, jrtc27, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D53491 llvm-svn: 349048
* Fix for llvm-dwarfdump changes for subroutine typesDavid Blaikie2018-12-121-2/+2
| | | | llvm-svn: 348974
* [AMDGPU] Emit MessagePack HSA Metadata for v3 code objectScott Linder2018-12-124-0/+261
| | | | | | | | | Continue to present HSA metadata as YAML in ASM and when output by tools (e.g. llvm-readobj), but encode it in Messagepack in the code object. Differential Revision: https://reviews.llvm.org/D48179 llvm-svn: 348963
* [mips] Use llvm-mc -triple option instead of combination of ↵Simon Atanasyan2018-12-1229-122/+142
| | | | | | arch,target-abi,mcpu. NFC llvm-svn: 348914
* [COFF, ARM64] Emit COFF function headerMandeep Singh Grang2018-12-111-0/+45
| | | | | | | | | | | | | | | | | | | | Summary: Emit COFF header when printing out the function. This is important as the header contains two important pieces of information: the storage class for the symbol and the symbol type information. This bit of information is required for the linker to correctly identify the type of symbol that it is dealing with. This patch mimics X86 and ARM COFF behavior for function header emission. Reviewers: rnk, mstorsjo, compnerd, TomTan, ssijaric Reviewed By: mstorsjo Subscribers: dmajor, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D55535 llvm-svn: 348875
* [WebAssembly] Add '.eventtype' directive supportHeejin Ahn2018-12-111-0/+2
| | | | | | | | | | | | | | Summary: This patch supports `.eventtype` directive printing and parsing in the same syntax with `.functype`. Reviewers: aardappel, sbc100 Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55353 llvm-svn: 348818
* [mips][mc] Emit R_{MICRO}MIPS_JALR when expanding jal to jalrVladimir Stefanovic2018-12-101-12/+52
| | | | | | | | | | | When replacing jal with jalr, also emit '.reloc R_MIPS_JALR' (R_MICROMIPS_JALR for micromips). The linker might then be able to turn jalr into a direct call. Add '-mips-jalr-reloc' to enable/disable this feature (default is true). Differential revision: https://reviews.llvm.org/D55292 llvm-svn: 348760
* [NFC][AArch64] Split out backend featuresDiogo N. Sampaio2018-12-0614-433/+673
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch splits backend features currently hidden behind architecture versions. For example, currently the only way to activate complex numbers extension is targeting an v8.3 architecture, where after the patch this extension can be added separately. This refactoring is required by the new command lines proposal: http://lists.llvm.org/pipermail/llvm-dev/2018-September/126346.html Reviewers: DavidSpickett, olista01, t.p.northover Subscribers: kristof.beyls, bryanpkc, javed.absar, pbarrio Differential revision: https://reviews.llvm.org/D54633 -- It was reverted in rL348249 due a build bot failure in one of the regression tests: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/14386 The problem seems to be that FileCheck behaves different in windows and linux. This new patch splits the test file in multiple, and does more exact pattern matching attempting to circumvent the issue. llvm-svn: 348493
* [WebAssembly] Change event section code to 13Heejin Ahn2018-12-051-1/+1
| | | | | | | | | | | | | | | Summary: We decided to change the event section code from 12 to 13 as new `DataCount` section in the bulk memory operations proposal will take the code 12 instead. Reviewers: sbc100 Subscribers: dschuff, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55343 llvm-svn: 348424
* [Hexagon] Add instruction definitions for Hexagon V66Krzysztof Parzyszek2018-12-053-0/+39
| | | | llvm-svn: 348411
* Recommit r348243 - "[llvm-mc] - Do not crash when referencing undefined ↵George Rimar2018-12-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | debug sections." The patch triggered an unrelated msan issue: LayoutOrder variable was not initialized. (http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/26794/steps/check-llvm%20msan/logs/stdio) It was fixed. Original commit message: MC has code that pre-creates few debug sections: https://github.com/llvm-mirror/llvm/blob/master/lib/MC/MCObjectFileInfo.cpp#L396 If users code has a reference to such section but does not redefine it, MC code currently asserts, because still thinks they are normally defined. The patch fixes the issue. Differential revision: https://reviews.llvm.org/D55173 ---- Modified : /llvm/trunk/lib/MC/ELFObjectWriter.cpp Added : /llvm/trunk/test/MC/ELF/undefined-debug.s llvm-svn: 348349
* Revert rL348121 from llvm/trunk: [NFC][AArch64] Split out backend featuresSimon Pilgrim2018-12-0410-419/+314
| | | | | | | | | | | | | | | | | | | | | | | | | This patch splits backend features currently hidden behind architecture versions. For example, currently the only way to activate complex numbers extension is targeting an v8.3 architecture, where after the patch this extension can be added separately. This refactoring is required by the new command lines proposal: http://lists.llvm.org/pipermail/llvm-dev/2018-September/126346.html Reviewers: DavidSpickett, olista01, t.p.northover Subscribers: kristof.beyls, bryanpkc, javed.absar, pbarrio Differential revision: https://reviews.llvm.org/D54633 ........ This has been causing buildbots failures for the past 24 hours: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/14386 llvm-svn: 348249
* Revert r348243 "[llvm-mc] - Do not crash when referencing undefined debug ↵George Rimar2018-12-041-5/+0
| | | | | | | | | | sections." It broke msan and asan bots it seems: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/26794/steps/check-llvm%20msan/logs/stdio http://lab.llvm.org:8011/builders/clang-s390x-linux/builds/20993/steps/ninja%20check%201/logs/stdio llvm-svn: 348248
* [llvm-mc] - Do not crash when referencing undefined debug sections.George Rimar2018-12-041-0/+5
| | | | | | | | | | | | | | MC has code that pre-creates few debug sections: https://github.com/llvm-mirror/llvm/blob/master/lib/MC/MCObjectFileInfo.cpp#L396 If users code has a reference to such section but does not redefine it, MC code currently asserts, because still thinks they are normally defined. The patch fixes the issue. Differential revision: https://reviews.llvm.org/D55173 llvm-svn: 348243
* [WebAssembly] Enforce assembler emits to streamer in order.Wouter van Oortmerssen2018-12-031-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The assembler processes directives and instructions in whatever order they are in the file, then directly emits them to the streamer. This could cause badly written (or generated) .s files to produce incorrect binaries. It now has state that tracks what it has most recently seen, to enforce they are emitted in a given order that always produces correct wasm binaries. Also added a new test that compares obj2yaml output from llc (the backend) to that going via .s and the assembler to ensure both paths generate the same binaries. The features this test covers could be extended. Passes all wasm Lit tests. Fixes: https://bugs.llvm.org/show_bug.cgi?id=39557 Reviewers: sbc100, dschuff, aheejin Subscribers: jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D55149 llvm-svn: 348185
* [COFF] Don't mark mingw .eh_frame sections writableMartin Storsjo2018-12-031-0/+13
| | | | | | | | | | | | | | This improves compatibility with GCC produced object files, where the .eh_frame sections are read only. With mixed flags for the involved .eh_frame sections, LLD creates two separate .eh_frame sections in the output binary, one for each flag combination, while ld.bfd probably merges them. The previous setup of flags can be traced back to SVN r79346. Differential Revision: https://reviews.llvm.org/D55209 llvm-svn: 348177
* [AArch64] Add command-line option for SSBSPablo Barrio2018-12-035-29/+35
| | | | | | | | | | | | | | | | | | | | | Summary: SSBS (Speculative Store Bypass Safe) is only mandatory from 8.5 onwards but is optional from Armv8.0-A. This patch adds a command line option to enable SSBS, as it was previously only possible to enable by selecting -march=armv8.5-a. Similar patch upstream in GNU binutils: https://sourceware.org/ml/binutils/2018-09/msg00274.html Reviewers: olista01, samparker, aemerson Reviewed By: samparker Subscribers: javed.absar, kristof.beyls, kristina, llvm-commits Differential Revision: https://reviews.llvm.org/D54629 llvm-svn: 348137
* [NFC][AArch64] Split out backend featuresDiogo N. Sampaio2018-12-0310-314/+419
| | | | | | | | | | | | | | | | | | | | | This patch splits backend features currently hidden behind architecture versions. For example, currently the only way to activate complex numbers extension is targeting an v8.3 architecture, where after the patch this extension can be added separately. This refactoring is required by the new command lines proposal: http://lists.llvm.org/pipermail/llvm-dev/2018-September/126346.html Reviewers: DavidSpickett, olista01, t.p.northover Subscribers: kristof.beyls, bryanpkc, javed.absar, pbarrio Differential revision: https://reviews.llvm.org/D54633 llvm-svn: 348121
* [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988Alex Bradbury2018-12-031-4/+0
| | | | | | | | | The test for [0x00 0x00] failed due to the introduction of c.unimp. This particular test is unnecessary now that c.unimp was defined (and is tested in test/MC/RISCV/rv32c-valid.s). llvm-svn: 348117
* [AMDGPU] Combine DPP mov with use instructions (VOP1/2/3)Valery Pykhtin2018-11-301-1/+0
| | | | | | | | Introduces DPP pseudo instructions and the pass that combines DPP mov with subsequent uses. Differential revision: https://reviews.llvm.org/D53762 llvm-svn: 347993
* [RISCV] Add additional CSR instruction aliases (imm. operands)Alex Bradbury2018-11-301-0/+20
| | | | | | | | | | | | | | This patch adds CSR instructions aliases for the cases where the instruction takes an immediate operand but the alias doesn't have the i suffix. This is necessary for gas/gcc compatibility. gas doesn't do a similar conversion for fsflags or fsrm, so this should be complete. Differential Revision: https://reviews.llvm.org/D55008 Patch by Luís Marques. llvm-svn: 347991
* [RISCV] Add UNIMP instruction (32- and 16-bit forms)Alex Bradbury2018-11-303-0/+12
| | | | | | | | | | | | | | | | | This patch adds support for UNIMP in both 32- and 16-bit forms. The 32-bit form can be seen as a variant of the ECALL/EBREAK/etc. family of instructions. The 16-bit form is just all zeroes, which isn't a valid RISC-V instruction, but still follows the 16-bit instruction form (i.e. bits 0-1 != 11). Until recently unimp was undocumented and supported just by binutils, which printed unimp for either the 16 or 32-bit form. Both forms are now documented <https://github.com/riscv/riscv-asm-manual/pull/20> and binutils now supports c.unimp <https://sourceware.org/ml/binutils-cvs/2018-11/msg00179.html>. Differential Revision: https://reviews.llvm.org/D54316 Patch by Luís Marques. llvm-svn: 347988
* Produce an error on non-encodable offsets for darwin ARM scattered relocations.Jonas Devlieghere2018-11-291-0/+15
| | | | | | | | | | | | | | Scattered ARM relocations for Mach-O's only have 24 bits available to encode the offset. This is not checked but just truncated and can result in corrupt binaries after linking because the relocations are applied to the wrong offset. This patch will check and error out in those situations instead of emitting a wrong relocation. Patch by: Sander Bogaert (dzn) Differential revision: https://reviews.llvm.org/D54776 llvm-svn: 347922
* [RISCV] Support .option push and .option popAlex Bradbury2018-11-282-1/+84
| | | | | | | | | This adds support in the RISCVAsmParser the storing of Subtarget feature bits to a stack so that they can be pushed/popped to enable/disable multiple features at once. Differential Revision: https://reviews.llvm.org/D46424 Patch by Lewis Revill. llvm-svn: 347774
* Reland test/MC/Mips/reloc-directive-label-offset.sVladimir Stefanovic2018-11-221-0/+75
| | | | | | | | | | The test was reverted because it failed on llvm-clang-x86_64-expensive-checks-win builder, and that was because -DEXPENSIVE_CHECKS adds randomness to llvm::sort(), affecting the order of relocation table entries. Modified the test to not have two relocations at the same offset. llvm-svn: 347476
* Removing test/MC/Mips/reloc-directive-label-offset.s temporarilyVladimir Stefanovic2018-11-211-74/+0
| | | | | | | This test is failing on llvm-clang-x86_64-expensive-checks-win builder. Removing it until I get it fixed. llvm-svn: 347433
* [mips][mc] Add basic support for R_MIPS_JALR/R_MICROMIPS_JALRVladimir Stefanovic2018-11-211-0/+13
| | | | | | | | | R_MIPS_JALR/R_MICROMIPS_JALR can now be parsed in .s files and emitted to .o. They are still not generated with JALR. Differential revision: https://reviews.llvm.org/D54721 llvm-svn: 347398
* [MC] Support labels as offsets in .reloc directiveVladimir Stefanovic2018-11-214-9/+93
| | | | | | | | | | | | | | | | | Currently, expressions like .reloc 1f, R_MIPS_JALR, foo 1: nop are not allowed, ie. an offset in .reloc can only be absolute value. This patch adds support for labels as offsets. If offset is a forward declared label, MCObjectStreamer keeps the fixup locally and adds it to the fixups vector after the label (and its offset) is defined. label+number is not supported yet. Differential revision: https://reviews.llvm.org/D53990 llvm-svn: 347397
* [WebAssembly] replaced .param/.result by .functypeWouter van Oortmerssen2018-11-191-4/+2
| | | | | | | | | | | | | | | | | | | | | Summary: This makes it easier/cleaner to generate a single signature from this directive. Also: - Adds the symbol name, such that we don't depend on the location of this directive anymore. - Actually constructs the signature in the assembler, and make the assembler own it. - Refactor the use of MVT vs ValType in the streamer and assembler to require less conversions overall. - Changed 700 or so tests to use it. Reviewers: sbc100, dschuff Subscribers: jgravelle-google, eraman, aheejin, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D54652 llvm-svn: 347228
* [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixupAnton Korobeynikov2018-11-161-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Linker fails to link example like this (simplified case from newlib sources): $ cat test.c extern const char _ctype_b[]; struct _t { char *ptr; }; struct _t T = { ((char *) _ctype_b + 3) }; $ cat ctype.c char _ctype_b[4] = { 0, 0, 0, 0 }; LD: test.o:(.data+0x0): warning: internal error: unsupported relocation error We also follow gnu toolchain here, where 2-byte relocation mapped to R_MSP430_16_BYTE, instead of R_MSP430_16. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54620 llvm-svn: 347074
* [MSP430] Add support for .refsym directiveAnton Korobeynikov2018-11-161-0/+14
| | | | | | | | | | | | | | | Introduces support for '.refsym' assembler directive. From GCC docs (for MSP430): '.refsym' - This directive instructs assembler to add an undefined reference to the symbol following the directive. No relocation is created for this symbol; it will exist purely for pulling in object files from archives. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54618 llvm-svn: 347041
* [WebAssembly] Split BBs after throw instructionsHeejin Ahn2018-11-161-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: `throw` instruction is a terminator in wasm, but BBs were not splitted after `throw` instructions, causing machine instruction verifier to fail. This patch - Splits BBs after `throw` instructions in WasmEHPrepare and adding an unreachable instruction after `throw`, which will be deleted in LateEHPrepare pass - Refactors WasmEHPrepare into two member functions - Changes the semantics of `eraseBBsAndChildren` in LateEHPrepare pass to match that of WasmEHPrepare pass, which is newly added. Now `eraseBBsAndChildren` does not delete BBs with remaining predecessors. - Fixes style nits, making static function names conform to clang-tidy - Re-enables the test temporarily disabled by rL346840 && rL346845 Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D54571 llvm-svn: 347003
* AMDHSA: More code object v3 fixes:Konstantin Zhuravlyov2018-11-156-19/+19
| | | | | | | | - Make sure IsaInfo::hasCodeObjectV3 returns true only for AMDHSA - Update assembler metadata tests to use v2 by default llvm-svn: 347001
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