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* [AMDGPU] gfx1010 VMEM and SMEM implementationStanislav Mekhanoshin2019-04-303-1/+398
* [WebAssembly] Fix test after r359602Dan Gohman2019-04-301-1/+1
* [AArch64][SVE] Asm: add aliases for unpredicated bitwise logical instructionsCullen Rhodes2019-04-294-0/+106
* [X86] Remove some intel syntax aliases on (v)cvtpd2(u)dq, (v)cvtpd2ps, (v)cvt...Craig Topper2019-04-294-160/+2925
* [llvm-nm][llvm-readelf] Avoid single-dash -long-option in testsFangrui Song2019-04-271-3/+2
* [AMDGPU] gfx1010 VOPC implementationStanislav Mekhanoshin2019-04-261-3/+0
* [AMDGPU] gfx1010 VOP3 and VOP3P implementationStanislav Mekhanoshin2019-04-261-2/+11
* [AMDGPU] gfx1010 VOP2 changesStanislav Mekhanoshin2019-04-261-0/+7
* [AMDGPU] gfx1010 SOP instructionsStanislav Mekhanoshin2019-04-247-29/+250
* [AMDGPU] gfx1010 sgpr register changesStanislav Mekhanoshin2019-04-241-2/+15
* [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiersLewis Revill2019-04-232-6/+38
* ARM: disallow add/sub to sp unless Rn is also sp.Tim Northover2019-04-232-0/+51
* [llvm-mc] - Properly set the the address align field of the compressed sections.George Rimar2019-04-231-3/+15
* [AMDGPU][MC] Corrected parsing of SP3 'neg' modifierDmitry Preobrazhensky2019-04-222-1/+29
* [llvm] Prevent duplicate files in debug line header in dwarf 5: another attemptAli Tamur2019-04-193-12/+13
* [AMDGPU][MC] Corrected handling of "-" before expressionsDmitry Preobrazhensky2019-04-171-1/+16
* [AMDGPU][MC] Corrected parsing of registersDmitry Preobrazhensky2019-04-172-1/+65
* Add slbfee instruction.Sean Fertile2019-04-151-0/+4
* [WebAssembly] Add DataCount section to object filesThomas Lively2019-04-1213-33/+47
* [RISCV] Diagnose invalid second input register operand when using %tprel_addRoger Ferrer Ibanez2019-04-111-0/+1
* [X86] Move the 2 byte VEX optimization for MOV instructions back to the X86As...Craig Topper2019-04-101-0/+104
* [X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2si with the {evex}...Craig Topper2019-04-101-88/+88
* [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match ga...Craig Topper2019-04-093-696/+712
* [WebAssembly] Add new explicit relocation types for PIC relocationsSam Clegg2019-04-041-2/+91
* [RISCV] Support assembling TLS add and associated modifiersLewis Revill2019-04-046-23/+61
* [AArch64][AsmParser] Fix .arch_extension directive parsingSander de Smalen2019-04-046-12/+154
* [AArch64] Update v8.5a MTE LDG/STG instructionsJaved Absar2019-04-033-272/+468
* [PowerPC] Fix reversed bit issue in DCMX mask for "xvtstdcdp" and "xvtstdcsp"...Stefan Pintilie2019-04-022-0/+13
* [RISCV] Support assembling @plt symbol operandsAlex Bradbury2019-04-023-0/+15
* [AArch64] Add v8.5-a Memory Tagging STZGM instructionDavid Spickett2019-04-013-0/+49
* [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructionsDavid Spickett2019-04-014-62/+46
* [AArch64] Add v8.5-a Memory Tagging GMID_EL1 registerDavid Spickett2019-04-013-0/+31
* [RISCV] Don't evaluatePCRelLo if a relocation will be forced (e.g. due to lin...Alex Bradbury2019-04-012-6/+8
* [AMDGPU][MC] Corrected conversion rules for inlinable constants to match rule...Dmitry Preobrazhensky2019-03-293-19/+72
* [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodesDmitry Preobrazhensky2019-03-291-0/+8
* [WebAssembly] Merge used feature sets, update atomics linkage policyThomas Lively2019-03-2910-51/+0
* [MC] Fix floating-point literal lexing.Eli Friedman2019-03-281-4/+43
* [AArch64][SVE] Asm: error on unexpected SVE vector register type suffixSander de Smalen2019-03-273-0/+35
* Revert of 357063 [AMDGPU][MC] Corrected handling of tied src for atomic retur...Dmitry Preobrazhensky2019-03-271-8/+0
* [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodesDmitry Preobrazhensky2019-03-271-0/+8
* Revert "[llvm] Reapply "Prevent duplicate files in debug line header in dwarf...Ali Tamur2019-03-263-13/+13
* [WebAssembly] Initial implementation of PIC code generationSam Clegg2019-03-261-0/+99
* [llvm] Reapply "Prevent duplicate files in debug line header in dwarf 5."Ali Tamur2019-03-263-13/+13
* [ARM][Asm] Accept upper case coprocessor number and registersOliver Stannard2019-03-262-0/+56
* X86AsmParser: Do not process a non-existent tokenCraig Topper2019-03-262-2/+6
* Revert "[llvm] Prevent duplicate files in debug line header in dwarf 5."Ali Tamur2019-03-253-13/+13
* [llvm] Prevent duplicate files in debug line header in dwarf 5.Ali Tamur2019-03-253-13/+13
* [AMDGPU] Implemented dwordx3 variants of buffer/tbuffer load/store intrinsicsTim Renouf2019-03-221-3/+3
* [RISCV] Add basic RV32E definitions and MC layer supportAlex Bradbury2019-03-225-0/+255
* [RISCV][NFC] Add test case to MC/RISCV/linker-relaxation.s showing incorrect ...Alex Bradbury2019-03-221-12/+28
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