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* X86: add alias for pushfw/popfw in Intel modeTim Northover2018-10-221-0/+5
| | | | | | | | | A while ago we changed pushf and popf in Intel mode to generate pushfq and popfq. Unfortunately that left us with no way to get the 16-bit encoding in Intel mode so this patch adds pushfw and popfw as aliases there. llvm-svn: 344949
* This patch is a result of D37262: The issues with X86 prefixes. It closes ↵Andrew V. Tischenko2017-10-161-4/+2
| | | | | | PR7709, PR17697, PR19251, PR32809 and PR21640. There could be other bugs closed by this patch. llvm-svn: 315899
* [X86][AsmParser] fix PR32035Coby Tayree2017-09-271-0/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D37473 llvm-svn: 314295
* [X86] Allow xacquire/xrelease prefixesCoby Tayree2017-08-211-0/+9
| | | | | | | Allow those prefixes on assembly code Differential Revision: https://reviews.llvm.org/D36845 llvm-svn: 311309
* [MC] Fix Intel Operand assembly parsing for .set idsNirav Dave2016-08-021-0/+5
| | | | | | | | | | | | | | | | | Recommitting after fixing overaggressive fastpath return in parsing. Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Associated commit to fix clang test commited shortly. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 277489
* Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"Hans Wennborg2016-08-011-5/+0
| | | | | | This caused PR28805. Adding a regression test. llvm-svn: 277402
* [MC][X86] Fix Intel Operand assembly parsing for .set idsNirav Dave2016-07-271-0/+5
| | | | | | | | | | | | | Fix intel syntax special case identifier operands that refer to a constant (e.g. .set <ID> n) to be interpreted as immediate not memory in parsing. Reviewers: rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22585 llvm-svn: 276895
* Post process ADC/SBB and use a shorter encoding if they use a sign extended ↵Craig Topper2013-03-181-0/+14
| | | | | | immediate. llvm-svn: 177243
* Refactor some duplicated code into helper functions.Craig Topper2013-03-181-0/+7
| | | | llvm-svn: 177242
* Add retw and lretw instructions. Also, fix Intel syntax parsing for allCharles Davis2012-04-111-0/+13
| | | | | | ret instructions. llvm-svn: 154468
* Intel syntax. Adjust special code, used to recognize cmp<comparison ↵Devang Patel2012-01-301-0/+3
| | | | | | code>{ss,sd,ps,pd}, for intel syntax. llvm-svn: 149291
* Intel Syntax: Extend special hand coded logic, to recognize special ↵Devang Patel2012-01-241-0/+3
| | | | | | instructions, for intel syntax. llvm-svn: 148864
* Intel syntax: Parse ... PTR [-8]Devang Patel2012-01-201-1/+2
| | | | llvm-svn: 148570
* Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.Devang Patel2012-01-201-1/+4
| | | | llvm-svn: 148569
* Post process 'and', 'sub' instructions and select better encoding, if available.Devang Patel2012-01-191-0/+8
| | | | llvm-svn: 148489
* Intel syntax: There is no need to create unary expr for simple negative ↵Devang Patel2012-01-191-0/+4
| | | | | | displacement. llvm-svn: 148486
* Post process 'xor', 'or' and 'cmp' instructions and select better encoding, ↵Devang Patel2012-01-191-0/+22
if available. llvm-svn: 148485
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